HD64F3670 Datasheet, PDF (9/305 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

7.1 Block Configuration..........................................................................................................73
7.2 Register Descriptions ........................................................................................................74
7.2.1 Flash Memory Control Register 1 (FLMCR1).........................................................75
7.2.2 Flash Memory Control Register 2 (FLMCR2).........................................................76
7.2.3 Erase Block Register 1 (EBR1) ...............................................................................76
7.2.4 Flash Memory Enable Register(FENR) ...................................................................77
7.3 On-Board Programming Modes........................................................................................77
7.3.1 Boot Mode ...............................................................................................................78
7.3.2 Programming/Erasing in User Program Mode.........................................................80
7.4 Flash Memory Programming/Erasing ...............................................................................81
7.4.1 Program/Program-Verify .........................................................................................81
7.4.2 Erase/Erase-Verify...................................................................................................84
7.4.3 Interrupt Handling when Programming/Erasing Flash Memory..............................84
7.5 Program/Erase Protection .................................................................................................86
7.5.1 Hardware Protection ................................................................................................86
7.5.2 Software Protection..................................................................................................86
7.5.3 Error Protection........................................................................................................86
Section 8 RAM ................................................................................................. 87
Section 9 I/O Ports ............................................................................................ 89
9.1 Port 1.................................................................................................................................89
9.1.1 Port Mode Register 1(PMR1) ..................................................................................90
9.1.2 Port Control Register 1(PCR1) ................................................................................91
9.1.3 Port Data Register 1(PDR1).....................................................................................91
9.1.4 Port Pull-Up Control Register 1(PUCR1)................................................................92
9.1.5 Pin Functions ...........................................................................................................92
9.2 Port 2.................................................................................................................................94
9.2.1 Port Control Register 2(PCR2) ................................................................................94
9.2.2 Port Data Register 2(PDR2).....................................................................................95
9.2.3 Pin Functions ...........................................................................................................95
9.3 Port 5.................................................................................................................................96
9.3.1 Port Mode Register 5(PMR5) ..................................................................................97
9.3.2 Port Control Register 5(PCR5) ................................................................................98
9.3.3 Port Data Register 5(PDR5).....................................................................................98
9.3.4 Port Pull-up Control Register 5(PUCR5).................................................................99
9.3.5 Pin Functions ...........................................................................................................99
9.4 Port 7.................................................................................................................................101
9.4.1 Port Control Register 7(PCR7) ................................................................................102
9.4.2 Port Data Register 7(PDR7).....................................................................................102
9.4.3 Pin Functions ...........................................................................................................103
9.5 Port 8.................................................................................................................................104
9.5.1 Port Control Register 8(PCR8) ................................................................................104
Rev. 2.0, 03/01, Page ix of xxiv