CN8478 Datasheet, PDF (93/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

CN8478/CN8474A/CN8472A/CN8471A
Multichannel Synchronous Communications Controller (MUSYCC™)
5.0 Memory Organization
5.1 Memory Architecture
The Base Address is written into MUSYCC by the host-initiated PCI
configuration access write cycles. After MUSYCC functions are
memory-mapped to PCI space, the host allocates shared memory space for each
supported channel group descriptors. It requires each Group Base Pointer to start
on a 2 kB boundary, as listed in Table 5-4 and Table 5-8, Group Base Pointer.
Table 5-4. Shared Memory Allocation—Group Descriptors
Channel Group
Descriptors
Start Address
End Address
Length
Group 0 Base Pointer
Group 1 Base Pointer
Group 2 Base Pointer
Group 3 Base Pointer
Group 4 Base Pointer
Group 5 Base Pointer
Group 6 Base Pointer
Group 7 Base Pointer
0090 0000h
0090 0800h
0090 1000h
0090 1800h
0090 2000h
0090 2800h
0090 3000h
0090 3800h
0090 061Ch
0090 0E1Ch
0090 161Ch
0090 1E1Ch
0090 261Ch
0090 2E1Ch
0090 361Ch
0090 3E1Ch
1,564 bytes
1,564 bytes
1,564 bytes
1,564 bytes
1,564 bytes
1,564 bytes
1,564 bytes
1,564 bytes
The Group Base Pointer value is written into MUSYCC by the host via PCI
write access cycles. The location of the Group Base Pointer register for each
group within MUSYCC is listed in Table 5-1.
For this illustration, the host must perform the following write operations, as
listed in Table 5-5.
Table 5-5. Host Assigns Group Base Pointers
Host Writes Pointer Value
To PCI Address
0090 0000h
0090 0800h
0090 1000h
0090 1800h
0090 2000h
0090 2800h
0090 3000h
0090 3800h
0240 0000h
0240 0800h
0240 1000h
02401800h
0240 2000h
0240 2800h
0240 3000h
02403800h
100660E
Conexant
5-7