CN8478 Datasheet, PDF (83/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

CN8478/CN8474A/CN8472A/CN8471A
4.0 Serial Interface
Multichannel Synchronous Communications Controller (MUSYCC™) 4.7 Tx and Rx FIFO Buffer Allocation and Manage-
4.7.1 Example Channel BUFFLOC and BUFFLEN Specification
With some subchanneling, only the Fixed Data Buffer (total of 64 dwords) is the
area available for Internal Data Buffer usage. If the buffer space is evenly divided
across 32 channels, the BUFFLOC and BUFFLEN specifications would be as
described in Table 5-18, Channel Configuration Descriptor. Table 4-3 lists the
subchannel buffer allocation on 32 channels.
Table 4-3. Example of 32-Channel with Subchanneling Buffer Allocation (Receive or Transmit)
Channel
Number
Within Channel Descriptor
BUFFLOC
(dword Offset from Start of
Fixed Data Buffer)
BUFFLEN⁽¹⁾
0
0
0
1
1
0
2
2
0
...
...
...
31
31
0⁽²⁾
NOTE(S):
(1) _{Assuming all channels within a group operate at the same bit rate, BUFFLEN = [(Total dwords ÷ Number of Channels) ÷ 2]–1.}
(2) _{BUFFLEN values larger than 1Fh do not increase the PCI burst length. BUFFLEN determines the number of dwords burst}
during a PCI read/write operation to fill or flush the internal data buffer. For example, BUFFLEN = 1Fh specifies a burst length
of 32 dwords.
100660E
Conexant
4-13