CN8478 Datasheet, PDF (198/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

7.0 Electrical and Mechanical Specifications
CN8478/CN8474A/CN8472A/CN8471A
7.2 Timing and Switching Specifications
Multichannel Synchronous Communications Controller (MUSYCC™)
Figure 7-10. EBUS Reset Timing
PCI
Reset
EBUS
Three-state
Output
EBUS
Input
8478_032
Reset Period
T_off
Three-state
Input Ignored
NOTE(S): The EBUS reset is dependent on the PRST* (PCI Reset) signal being asserted low.
Table 7-12. EBUS I/O Timing Parameters
Symbol
Parameter
Min
Max
Units
T_val
PCI Clock Fall to Signal Valid Delay—Bused
Signal⁽¹⁾
2
15
ns
T_val (ptp)
PCI Clock Fall to Signal Valid Delay—Point To
2
15
ns
Point⁽¹⁾
T_on
Float to Active Delay⁽²⁾
—
30
ns
T_off
Active to Float Delay⁽²⁾
—
30
ns
T_ds
Input Setup Time to Clock—Bused Signal
3
—
ns
T_ds (ptp)
Input Setup Time to Clock—Point To Point
3
—
ns
T_dh
Input Hold Time from Clock
7
—
ns
T_de
PCI Clock Fall to ECLK rising edge
—
7
ns
NOTE(S):
(1) _{Minimum and maximum times are evaluated at 80 pF equivalent load. Actual test capacitance may vary, and results should}
be correlated to these specifications.
(2) _{For purposes of active/float timing measurements, the hi-z or off state is when the total current delivered through the}
component pin is less than or equal to the leakage current specification at 80 pF equivalent load.
7-12
Conexant
100660E