CN8478 Datasheet, PDF (160/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

6.0 Basic Operation
6.3 Channel Operation
CN8478/CN8474A/CN8472A/CN8471A
Multichannel Synchronous Communications Controller (MUSYCC™)
The frequency of polling is controlled independently for each channel group
by the SFALIGN (superframe alignment) and POLLTH (poll throttle) bit fields in
the Group Configuration Descriptor.
The SFALIGN bit field defines the source of the synchronization event to be
used by MUSYCC. The source is either an internal flywheel method or an
external signal at the serial port.
NOTE: Time slot counter or flywheel time base method uses a 7-bit counter. As
each bit is serviced, over 32 channels with 8 bits per channel in a
2.048 MHz data stream, the counter is incremented. When the counter
rolls over to 0, a Beginning of Frame is declared. At 2.048 MHz, 256 bits
represents 125 ms.
The POLLTH bit field specifies how often MUSYCC checks the owner bit in
a host-owned Buffer Descriptor. The values correspond to 1-, 16-, 32-, or
64-frame periods, or 125 µs, 2 ms, 4 ms, and 8 ms, respectively. The POLLTH bit
field is always used in conjunction with the SFALIGN bit field. Table 6-11 lists
the various polling frequencies and times.
If the serial port is configured for Nx64 mode (a variable number of 64 kbps
channels assigned to form one logical channel), the Time Slot Counter is reset
only when the inputs TSYNC or RSYNC are asserted. In this case, the SFALIGN
bit field is always ignored.
Table 6-11. Polling Frequency Using a Time Slot Counter Method
Standard Channelized Input
Poll Throttle Value (Multiples of Frames)
Name
Rate (MHz)
Bits Per Frame
0 (x1)
1 (x16)
2 (x32)
3 (x64)
T1
1.536
192
125 µs
2 ms
4 ms
8 ms
E1
2.048
256
125 µs
2 ms
4 ms
8 ms
2 E1
4.096
512
125 µs
2 ms
4 ms
8 ms
4 E1
8.192
1024
125 µs
2 ms
4 ms
8 ms
6.3.21 Repeat Message Transmission
MUSYCC provides a mechanism to repeatedly transmit a single message. A
transmitter channel enters the repeat mode if the REPEAT bit field is 1, and the
EOM bit field is 1 in a Transmit Buffer Descriptor.
NOTE: The message being repeatedly transmitted be specified completely by a
single Message Descriptor and not by a linked list of descriptors.
A repeating message either fits entirely in the internal FIFO buffer space
allocated for the transmitter channel, or the message is accessed in pieces over the
PCI bus and then re-accessed from the beginning when the end of buffer is
reached. The determination of whether the message fits entirely in the FIFO
buffer or not is automatically performed each time MUSYCC enters repeat mode.
MUSYCC compares the BLEN bit field (which specifies the number of bytes in
the message) from the Transmit Buffer Descriptor to [(BUFFLEN + 1) x 2]
(which specifies the number of dwords in the FIFO buffer) from the Channel
Configuration Descriptor.
6-26
Conexant
100660E