CN8478 Datasheet, PDF (40/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

2.0 Host Interface
2.1 PCI Interface
CN8478/CN8474A/CN8472A/CN8471A
Multichannel Synchronous Communications Controller (MUSYCC™)
2.1 PCI Interface
The host interface in MUSYCC is compliant with the PCI Local Bus
Specification (Revision 2.1, June 1, 1995). MUSYCC provides a PCI interface
specific to 3.3 V and 33 or 66 MHz operation.
NOTE: The PCI Local Bus Specification (Revision 2.1, June 1, 1995) is an
architectural, timing, electrical, and physical interface standard providing
the parameters for a device to connect with processor and memory
systems.
The host interface can act as both a PCI master and PCI slave, and contains
MUSYCC’s PCI configuration space and internal registers. When MUSYCC
must access shared memory, it masters the PCI bus and completes the memory
cycles without external intervention.
MUSYCC provides the host with a PCI bridge to an on-device EBUS, and
behaves as a PCI slave when providing this access.
MUSYCC is a multifunction PCI agent. One function is mapped to the layer 2
HDLC control logic; a second function is mapped to the layer 1 physical interface
for the expansion bus pins.
2.1.1 PCI Initialization
Generally, when a system initializes a module containing a PCI device, the
configuration manager reads the configuration space of each PCI device on a PCI
bus. Hardware signals select a specific PCI device based on a bus number, a slot
number, and a function number. If the addressed device (via signal lines) responds
to the configuration cycle by claiming the bus, that function’s configuration space
is read out from the device during the cycle. Because any PCI device can be a
multifunction device, every supported function’s configuration space must be
read from the device. Based on the information read, the configuration manager
assigns system resources to each supported function within the device.
Sometimes new information must be written to the function’s configuration
space; this is accomplished with a configuration write cycle.
MUSYCC is a multifunction device with device-resident memory to store the
required configuration information. MUSYCC supports Function 0 and
Function 1 and, as such, only responds to Function 0 and Function 1
configuration cycles, defined as listed below:
• Function 0: All HDLC processing as an HDLC network controller. Can
master the PCI bus or respond to slave accesses from another bus master.
• Function 1: EBUS bridge to local devices. Responds only when another
bus master performs a memory access into the Function 1 address range.
2-2
Conexant
100660E