CN8478 Datasheet, PDF (113/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

CN8478/CN8474A/CN8472A/CN8471A
Multichannel Synchronous Communications Controller (MUSYCC™)
5.0 Memory Organization
5.2 Descriptors
Table 5-18. Channel Configuration Descriptor (2 of 3)
Bit
Field
Name
Value
Description
14:12 PROTOCOL[2:0]
11:10
MAXSEL[1:0]
0
TRANSPARENT
1
SS7-HDLC-FCS16
2
HDLC-FCS16
3
HDLC-FCS32
4–7
Reserved.
0
Message Length—Disable message length check.
1
Message Length—Use Register 1. Use MAXFRM1 bit field in the message
length descriptor for maximum receive message length limit.
9
FCS
2
Message Length—Use Register 2. Use MAXFRM2 bit field in the message
length descriptor for maximum receive message length limit.
3
Reserved
0
FCS Transfer Normal. For receive, do not transfer received FCS into shared
memory along with data message. For transmit, do transmit calculated FCS out
serial port after last bit in last data buffer has been transmitted.
1
FCS=1. Non FSC Mode. For receive, transfer received FCS 31 into shared
memory along with data message; do not transmit calculated FCS out of serial
port.
In Non-FCS Mode, a SHT message detection is disabled. Any number of bytes
can be transmitted and received within any single message, including message
length of only one byte.
8
MSKSUERR
7
MSKSINC
0
SUERR Interrupt enabled. Receive only. For SS7-HDLC-FCS16 mode, Signal
Unit Error Rate Monitor function generates interrupt when signal unit error
count crosses signal unit error threshold.
1
SUERR Interrupt disabled.
0
SINC Interrupt enabled. Receive only. For SS7-HDLC-FCS16 mode, SUERM
function generates interrupt when signal unit error count increments.
1
SINC Interrupt disabled.
6
MSKSDEC
0
SDEC Interrupt enabled. Receive only. For SS7-HDLC-FCS16 mode, SUERM
function generates interrupt when signal unit error count decrements.
1
SDEC Interrupt disabled.
5
MSKSFILT
0
SFILT Interrupt enabled. Receive only. For SS7-HDLC-FCS16 mode, interrupt
generated when two consecutive received messages are found to be identical.
Second message discarded.
1
SFILT Interrupt disabled. For SS7-HDLC-FCS16 mode, interrupt is not
generated when two consecutive received messages are found to be identical.
Second message discarded.
4
MSKIDLE
0
CHABT, CHIC, SHT Interrupt enabled. Receive only. When receiver detects
change to abort code, change to idle code, or too-short message, this bit
generates interrupt to indicate condition.
1
CHABT, CHIC, SHT Interrupt disabled.
100660E
Conexant
5-27