CN8478 Datasheet, PDF (50/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

2.0 Host Interface
2.2 PCI Configuration Registers
CN8478/CN8474A/CN8472A/CN8471A
Multichannel Synchronous Communications Controller (MUSYCC™)
Register 4, Address 10h
Table 2-7. Register 4, Address 10h
Bit
Field
Name
Reset
Value
Type
Description
31:20 MUSYCC - Function 0
0
RW Allows for 1 MB bounded PCI bus address space to be blocked
Base Address Register
off as MUSYCC space. MUSYCC responds as a PCI slave with
DEVSEL* to all bus cycles whose address bits 31:20 match the
value of bits 31:20 of this register, and whose upper address bits
are non-zero, and memory space is enabled in the Function 0
Register 1, memory space bit field.
Reads to addresses within this space that are not
implemented will read back 0; writes have no effect.
19:4
0
RO When appended to bits 31:20, these bits specify a 1 MB bound
memory range. 1 MB is the only amount of address space that a
MUSYCC function can be assigned.
3
0
RO MUSYCC memory space is not prefetchable.
2:1
0
RO MUSYCC can be located anywhere in 32-bit address space.
0
0
RO This base register is a memory space base register, as opposed
to I/O mapped.
NOTE(S): An active-low signal is denoted by a trailing asterisk (*).
Register 5–14, Address
14h–38h
Table 2-8. Registers 5–14, Addresses 14h–38h
Bit
Field
Name
Reset
Value
Type
31:0 Reserved
0
RO
Unused.
Description
2-12
Conexant
100660E