CN8478 Datasheet, PDF (173/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

CN8478/CN8474A/CN8472A/CN8471A
Multichannel Synchronous Communications Controller (MUSYCC™)
6.0 Basic Operation
6.4 Protocol Support
Channel Level Recovery Actions:
• If possible, increase internal FIFO buffer space for this channel. For this
action, the channel must be deactivated first.
• If required, alleviate congestion of the PCI bus.
• Change of Frame Alignment (COFA) while Receiving HDLC Message
(T1/E1 modes)
In the case of a Change of Frame Alignment while receiving an HDLC message
(T1/E1 modes), the RSYNC input signal transitions from low to high
unexpectedly by the “frame synchronization flywheel mechanism.” This error
applies only to ports configured for T1, E1, 2xE1, or 4xE1 signals. Frame
synchronization indicates the location of time slot 0 in the serial data stream.
Lacking frame synchronization, the received channelized data becomes unaligned
and unmappable. This error affects all active channels in the channel group.
Reason:
• T1/E1 signal failure is detected by the physical interface providing the
serial data, clock frequency, and synchronization to the serial interface on
MUSYCC.
Effects:
• Causes the serial interface to enter the COFA mode for one T1/E1 frame
period (125 µs).
• For each activated channel receiving an HDLC message, the remainder of
the HDLC message currently being received is discarded, and the receiver
scans for the opening flag of the next HDLC message before attempting to
fill the channel’s FIFO buffer again.
• For each activated channel receiving an HDLC message, the ownership of
the current Message Descriptor is granted back to the host by writing the
Receive Buffer Status Descriptor with ONR = HOST and
ERROR = COFA (if INHRBSD = 0 in Receive Channel Configuration
Descriptor).
• After all activated channels are serviced, MUSYCC writes the Interrupt
Descriptor in Interrupt Queue with ERROR = COFA. DIR = 0
(if MSKCOFA = 0 in Group Configuration Descriptor).
• After the COFA condition clears, normal bit-level operations continue.
• The BLP scans for the opening flag of the next HDLC message.
• Simultaneously, DMAC checks for Message Descriptor ownership before
transferring received data to shared memory.
Channel Level Recovery Actions:
• None required.
100660E
Conexant
6-39