CN8478 Datasheet, PDF (128/221 Pages) Conexant Systems, Inc – Multichannel Synchronous Communications Controller (MUSYCC)

5.0 Memory Organization
5.2 Descriptors
Table 5-31. Interrupt Descriptor (2 of 4)
CN8478/CN8474A/CN8472A/CN8471A
Multichannel Synchronous Communications Controller (MUSYCC™)
Bit
Field
Field
Name
Value
Interrupt
Name
Description
19:16 ERROR[3:0] 0
1
2
3
4
5-7
8
NONE
BUFF⁽²⁾
COFA⁽²⁾
ONR
PROT
OOF⁽²⁾
VVVV
No error to report in this interrupt.
V V V V V Buffer Error. Data is lost. MUSYCC has no place to read or
write data internally. If from transmitter, then internal buffer
underflow. If from receiver, internal buffer overflow.
V
V V V Change of Frame Alignment. Generated when serial port is
configured in channelized mode and transmitter or receiver
synchronization signal assertion is detected during a
bit-time, and the synchronization signal is misaligned with
internal flywheel mechanism in serial interface. This
condition affects all channels in the group.
TCOFA - immediately deactivates all tx channels in the
affected group (that includes multiple groups if non-zero
PORTMAP). Therefore, after a TCOFA, MUSYCC does not
update any tx message descriptor and does not generate
any EOB/EOM interrupts unless the message is already sent
or buffer already processed. MUSYCC stops polling any
active tx channel’s descriptor and the transmit serial data
(TDAT) output should immediately go to the deactivated
state (either all ones or three-state) ascending to TRITX
setting.
RCOFA - every channel currently receiving message will
have its message terminated with COFA error. Every active
channel will be left activated.
V V V V V Owner-Bit Error. Generated when next message
pointer/descriptor is not available to MUSYCC when
expected. This error is similar to BUFF error except that
MUSYCC has no place to read or write data in shared
memory, for example, when MUSYCC can not write out a
Buffer Status Descriptor.
V V V V V Memory Protection Violation. Generated when memory
protection is enabled, and MUSYCC attempts a PCI master
mode access to an address outside the memory region
specified in a group’s Memory Protection Descriptor. The
memory access is inhibited.
Reserved.
V
V V Out of Frame. Generated when serial port is configured in
channelized mode, and receiver-out-of-frame (ROOF) input
signal assertion is detected.
5-42
Conexant
100660E