EP2C8T144C8N Datasheet, PDF (441/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

IEEE 1149.1 (JTAG) Boundary-Scan Testing for Cyclone II Devices
If you are testing the device after configuring it, the programmable weak
pull-up resister or the bus hold feature overrides the CLAMP value (the
value stored in the update register of the boundary-scan cell) at the pin.
HIGHZ Instruction Mode
The HIGHZ instruction mode is used to set all of the user I/O pins to an
inactive drive state. These pins are tri-stated until a new JTAG instruction
is executed. When this instruction is loaded into the instruction register,
the bypass register is connected between the TDI and TDO ports.
If you are testing the device after configuring it, the programmable weak
pull-up resistor or the bus hold feature overrides the HIGHZ value at the
pin.
f
I/O Voltage Support in JTAG Chain
A JTAG chain can contain several different devices. However, you should
be cautious if the chain contains devices that have different V_CCIO levels.
The output voltage level of the TDO pin must meet the specifications of
the TDI pin it drives. For Cyclone II devices, the TDO pin is powered by
the V_CCIO power supply. Since the V_CCIO supply is 3.3 V, the TDO pin
drives out 3.3 V.
Devices can interface with each other although they might have different
V_CCIO levels. For example, a device with a 3.3-V TDO pin can drive to a
device with a 5.0-V TDI pin because 3.3 V meets the minimum TTL-level
V_IH for the 5.0-V TDI pin. JTAG pins on Cyclone II devices can support
2.5- or 3.3-V input levels.
For more information on MultiVolt I/O support, see the Cyclone II
Architecture chapter in Volume 1 of the Cyclone II Device Handbook.
You can also interface the TDI and TDO lines of the devices that have
different V_CCIO levels by inserting a level shifter between the devices. If
possible, the JTAG chain should be built such that a device with a higher
V_CCIO level drives to a device with an equal or lower V_CCIO level. This
way, a level shifter may be required only to shift the TDO level to a level
acceptable to the JTAG tester. Figure 14–13 shows the JTAG chain of
mixed voltages and how a level shifter is inserted in the chain.
Altera Corporation
February 2007
14–15
Cyclone II Device Handbook, Volume 1