EP2C8T144C8N Datasheet, PDF (327/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

High-Speed Differential Interfaces in Cyclone II Devices
Table 11–1. LVDS I/O Specifications (Part 2 of 2) Note (1)
Symbol
Parameter
Condition
Min
V_{I D}
Input differential voltage
0.1
(single-ended)
V_{I C M}
Input common mode
0.1
voltage
ΔV_OS
Change in V_OS between R_L = 100 Ω
H and L
R_L
Receiver differential input
90
resistor
Note to Table 11–1:
(1) The specifications apply at the resistor network output.
Typ
Max Units
0.65
V
2.0
V
50
mV
100
110
Ω
LVDS Receiver & Transmitter
Figure 11–3 shows a simple point-to-point LVDS application where the
source of the data is an LVDS transmitter. These LVDS signals are
typically transmitted over a pair of printed circuit board (PCB) traces, but
a combination of a PCB trace, connectors, and cables is a common
application setup.
Figure 11–3. Typical LVDS Application
Transmitting Device
txout + rxin +
100 Ω
txout - rxin -
Cyclone II Device
Cyclone II
Logic
Array
txout +
120 Ω
120 Ω
txout -
rxin +
170 Ω
100 Ω
rxin -
Receiving Device
Input Buffer
Output Buffer
Figures 11–4 and 11–5 show the signaling levels for LVDS receiver inputs
and transmitter outputs, respectively.
Altera Corporation
February 2007
11–5
Cyclone II Device Handbook, Volume 1