EP2C8T144C8N Datasheet, PDF (396/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

PS Configuration
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DATA3, you can leave the corresponding bit 3 line blank in the Quartus II
software. On the printed circuit board (PCB), leave the DATA3 line from
the enhanced configuration device unconnected. Use the Quartus II
Convert Programming Files window (Tools menu) setup for this scheme.
You can also connect two FPGAs to one of the configuration device’s
DATA pins while the other DATA pins drive one device each. For example,
you could use the 2-bit PS mode to drive two FPGAs with DATA bit 0 (two
EP2C5 devices) and the third device (an EP2C8 device) with DATA bit 1.
In this example, the memory space required for DATA bit 0 is the sum of
the SOF file size for the two EP2C5 devices.
1,223,980 bits + 1,223,980 bits = 2,447,960 bits
The memory space required for DATA bit 1 is the SOF file size for on
EP2C8 device (1,983,792 bits). Since the memory space required for DATA
bit 0 is larger than the memory space required for DATA bit 1, the size of
the POF file is 2 × 2,447,960 = 4,895,920.
For more information on using n-bit PS modes with enhanced
configuration devices, see the Using Altera Enhanced Configuration Devices
in the Configuration Handbook.
When configuring SRAM-based devices using n-bit PS modes, use
Table 13–8 to select the appropriate configuration mode for the fastest
configuration times.
Table 13–8. Recommended Configuration Using n-Bit PS Modes
Number of Devices (1)
1
2
3
4
5
6
7
8
Recommended Configuration Mode
1-bit PS
2-bit PS
4-bit PS
4-bit PS
8-bit PS
8-bit PS
8-bit PS
8-bit PS
Note to Table 13–8:
(1) Assume that each DATA line is only configuring one device, not a daisy chain of
devices.
13–42
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2007