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EP2C8T144C8N Datasheet, PDF (411/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1
Configuring Cyclone II Devices
When designing a Cyclone II board for JTAG configuration, use the
guidelines in Table 13–10 for the placement of the dedicated
configuration pins.
Table 13–10. Dedicated Configuration Pin Connections During JTAG
Configuration
Signal
nCE
nCEO
MSEL
nCONFIG
nSTATUS
CONF_DONE
DCLK
Description
On all Cyclone II devices in the chain, nCE should be driven
low by connecting it to ground, pulling it low via a resistor, or
driving it by some control circuitry. For devices that are also in
multiple device AS, or PS configuration chains, the nCE pins
should be connected to GND during JTAG configuration or
JTAG configured in the same order as the configuration chain.
On all Cyclone II devices in the chain, nCEO can be used as a
user I/O or connected to the nCE of the next device. If nCEO is
connected to the nCE of the next device, the nCEO pin must
be pulled high to VC C I O by an external 10-kΩ pull-up resistor
to help the internal weak pull-up resistor. If the nCEO pin is not
connected to the nCE pin of the next device, you can use it as
a user I/O pin after configuration.
These pins must not be left floating. These pins support
whichever non-JTAG configuration is used in production. If
only JTAG configuration is used, you should tie these pins to
ground.
Driven high by connecting to VC C, pulling up via a resistor, or
driven high by some control circuitry.
Pull to VCC via a 10-kΩ resistor. When configuring multiple
devices in the same JTAG chain, each nSTATUS pin should
be pulled up to VCC individually. nSTATUS pulling low in the
middle of JTAG configuration indicates that an error has
occurred.
Pull to VCC via a 10-kΩ resistor. When configuring multiple
devices in the same JTAG chain, each CONF_DONE pin
should be pulled up to VCC individually. CONF_DONE going
high at the end of JTAG configuration indicates successful
configuration.
Should not be left floating. Drive low or high, whichever is more
convenient on your board.
Figure 13–23 shows JTAG configuration of a Cyclone II device with a
microprocessor.
Altera Corporation
February 2007
13–57
Cyclone II Device Handbook, Volume 1