EP2C8T144C8N Datasheet, PDF (415/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Altera Corporation
February 2007
Configuring Cyclone II Devices
Combining JTAG & Active Serial Configuration Schemes
You can combine the AS configuration scheme with JTAG-based
configuration. Set the MSEL[1..0] pins to 00 (AS mode) or 10 (Fast AS
mode)in this setup, which uses two 10-pin download cable headers on the
board. The first header programs the serial configuration device in the
system via the AS programming interface, and the second header
configures the Cyclone II directly via the JTAG interface.
If you try configuring the device using both schemes simultaneously,
JTAG configuration takes precedence and AS configuration is
terminated.
When a blank serial configuration device is attached to Cyclone II device,
turn on the Halt on-chip configuration controller option under the Tools
menu by clicking Options. The Options dialog box appears. In the
Category list, select Programmer before starting the JTAG configuration
with the Quartus II programmer. This option stops the AS
reconfiguration loop from a blank serial configuration device before
starting the JTAG configuration. This includes using the Serial Flash
Loader IP because JTAG is used for configuring the Cyclone II device.
Users do not need to recompile their Quartus II designs after turning on
this Option.
Programming Serial Configuration Devices In-System Using the
JTAG Interface
Cyclone II devices in a single device chain or in a multiple device chain
support in-system programming of a serial configuration device using
the JTAG interface via the serial flash loader design. The board’s
intelligent host or download cable can use the four JTAG pins on the
Cyclone II device to program the serial configuration device in system,
even if the host or download cable cannot access the configuration
device’s configuration pins (DCLK, DATA, ASDI, and nCS pins).
The serial flash loader design is a JTAG-based in-system programming
solution for Altera serial configuration devices. The serial flash loader is
a bridge design for the FPGA that uses its JTAG interface to access the
EPCS JIC (JTAG Indirect Configuration Device Programming) file and
then uses the AS interface to program the EPCS device. Both the JTAG
interface and AS interface are bridged together inside the serial flash
loader design.
In a multiple device chain, you only need to configure the master
Cyclone II device which is controlling the serial configuration device. The
slave devices in the multiple device chain which are configured by the
serial configuration device do not need to be configured when using this
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Cyclone II Device Handbook, Volume 1