EP2C8T144C8N Datasheet, PDF (389/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Altera Corporation
February 2007
Configuring Cyclone II Devices
Configuration Stage
When the nSTATUS pin transitions high, the configuration device’s OE
pin also transitions high and the configuration device clocks data out
serially to the FPGA using its internal oscillator. The Cyclone II device
receives configuration data on its DATA0 pin and the clock is received on
the DCLK pin. Data is latched into the FPGA on the rising edge of DCLK.
After the FPGA has received all configuration data successfully, it
releases the open-drain CONF_DONE pin, which is pulled high by a pull-
up resistor. Since the Cyclone II device’s CONF_DONE pin is tied to the
configuration device's nCS pin, the configuration device is disabled when
CONF_DONE goes high. Enhanced configuration and EPC2 devices have
an optional internal pull-up resistor on the nCS pin. You can turn this
option on in the Quartus II software from the General tab of the Device
& Pin Options dialog box. If you do not use this internal pull-up resistor,
you need to connect an external 10-kΩ pull-up resistor to the nCS and
CONF_DONE line. A low-to-high transition on CONF_DONE indicates
configuration is complete, and the device can begin initialization.
Initialization Stage
In Cyclone II devices, the default initialization clock source is the
Cyclone II internal oscillator (typically 10 MHz). Cyclone II devices can
also use the optional CLKUSR pin. If your design uses the internal
oscillator, the Cyclone II device supplies itself with enough clock cycles
for proper initialization. The advantage of using the internal oscillator is
you do not need to use another device or source to send additional clock
cycles to the CLKUSR pin during the initialization stage. Additionally, you
can use of the CLKUSR pin as a user I/O pin, which means you have an
additional user I/O pin.
If you want to delay the initialization of the device, you can use the
CLKUSR pin. Using the CLKUSR pin allows you to control when the
Cyclone II device enters user mode. You can delay the Cyclone II devices
from entering user mode for an indefinite amount of time. You can turn
on the Enable user-supplied start-up clock (CLKUSR) option in the
Quartus II software from the General tab of the Device & Pin Options
dialog box. Supplying a clock on CLKUSR does not affect the
configuration process. After all configuration data is accepted and
CONF_DONE goes high, Cyclone II devices require 299 clock cycles to
properly initialize and support a CLKUSR f_MAX of 100 MHz.
An optional INIT_DONE pin is available, which signals the end of
initialization and the start of user mode with a low-to-high transition. The
Enable INIT_DONE output option is available in the Quartus II software
from the General tab of the Device & Pin Options dialog box. If you use
the INIT_DONE pin, an external 10-kΩ pull-up resistor pulls it high when
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Cyclone II Device Handbook, Volume 1