XC3SD3400A-4FGG676C Datasheet, PDF(74/101 Page) Xilinx, Inc – Spartan-3A DSP FPGA Family Data Sheet

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XC3SD3400A-4FGG676C Datasheet, PDF (74/101 Pages) Xilinx, Inc – Spartan-3A DSP FPGA Family Data Sheet

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Spartan-3A DSP FPGA Family: Pinout Descriptions

Bank 0

INPUT

I/O

L11P_0

I/O

L10P_0

INPUT

I/O

L06P_0

VREF_0

I/O

L06N_0

INPUT

I/O

L07N_0

I/O

TCK GND A

GND

I/O VCCO_0 I/O

L11N_0

L10N_0

GND

I/O VCCO_0 I/O

I/O VCCAUX TDO

L03P_0

L02N_0 L07P_0

I/O

L14N_0

I/O

L14P_0

INPUT

I/O

L12N_0

VREF_0

I/O

L08N_0

I/O

L03N_0

I/O

L02P_0

VREF_0

I/O

L01N_0

GND

INPUT

L39N_1

INPUT

L39P_1

VREF_1

VCCAUX I/O

I/O

L09N_0 L12P_0 L08P_0

GND

INPUT

I/O

L01P_0

I/O

L36P_1

A20

I/O

L37P_1

A22

I/O

L37N_1 D

A23

I/O

L17P_0

GCLK4

I/O VCCO_0 I/O

L09P_0

L05P_0

I/O

L04P_0

I/O

INPUT VCCAUX L36N_1

A21

I/O VCCO_1 I/O

L35N_1

L33N_1

INPUT I/O

I/O

L13N_0 L13P_0 L05N_0 L04N_0

GND

I/O

L38N_1

A25

I/O

L38P_1

A24

I/O

L30N_1

A19

I/O

L35P_1

I/O

L33P_1

VCCAUX

GND

VCCAUX

GND

VCCINT I/O

L34P_1

I/O

L34N_1

I/O

L30P_1

A18

INPUT

L31N_1

GND

I/O

L28N_1

GND VCCINT GND VCCINT GND

I/O

L26P_1

A14

I/O

L26N_1

A15

GND

I/O

L32N_1

INPUT

L31P_1

VREF_1

I/O

L28P_1

VCCINT

GND

VCCINT

GND

VCCAUX

I/O

L29N_1

A17

VCCO_1

I/O

L32P_1

I/O

L25N_1

A13

INPUT

L27P_1

INPUT

L27N_1

GND

VCCINT

GND

I/O

VCCINT L29P_1

A16

INPUT

L23N_1

I/O

L24N_1

I/O

L24P_1

I/O

L25P_1 VCCO_1 L22N_1 K

A12

A11

I/O INPUT

I/O

VCCINT GND VCCINT GND VCCAUX L21N_1 L23P_1 GND L20N_1 L20P_1 L22P_1 L

RHCLK7 VREF_1

RHCLK5 RHCLK4 A10

GND VCCINT GND VCCINT GND

I/O

L18N_1

RHCLK1

I/O

L21P_1

IRDY1

RHCLK6

VCCAUX

I/O

L19N_1

TRDY1

RHCLK3

GND

I/O

L17N_1 M

I/O

VCCINT GND VCCINT GND VCCAUX L13P_1 L18P_1 L15N_1 L15P_1 L19P_1 L17P_1 N

A2 RHCLK0 A7

A6 RHCLK2 A8

GND

VCCINT

GND

I/O

VCCINT L13N_1

INPUT

L12N_1 VCCO_1

VREF_1

I/O

L10P_1

INPUT

L16N_1

VCCO_1

I/O

L14N_1

VCCINT GND VCCINT GND

GND

INPUT

L12P_1

I/O

L10N_1

I/O

L07P_1

I/O

L07N_1

INPUT

L16P_1

VREF_1

I/O

L14P_1

GND VCCAUX GND

GND VCCINT I/O

I/O

L05N_1 L05P_1

GND

I/O

L09N_1

GND

I/O

L11N_1 T

VREF_1

I/O

L17P_2

GCLK0

I/O

L20P_2

I/O

L25P_2

I/O

L25N_2

I/O

L28P_2

GND

I/O

L01P_1

HDC

I/O

L01N_1

LDC2

I/O

L09P_1

INPUT

L08N_1

VREF_1

I/O

L11P_1

I/O

L17N_2

GCLK1

I/O

L20N_2

MOSI

VCCO_2

INPUT

VREF_2

I/O

L28N_2

I/O

L31N_2

CCLK

VCCAUX

SUSPEN

I/O

L03N_1

VCCO_1

INPUT

L08P_1

GND

CSI B

INPUT

VREF_2

I/O

L21N_2

I/O

L24P_2

INIT_B

GND

I/O

L31P_2

INPUT

VREF_2

I/O

L03P_1

INPUT INPUT

L04N_1

VREF_1

L04P_1

I/O

L06P_1

DIN/MISO

INPUT

I/O

L21P_2

INPUT

VREF_2

I/O

L24N_2

I/O

L29N_2

I/O

L29P_2

I/O

L26P_2

I/O

L26N_2

GND

I/O

L02P_1

LDC1

I/O

L06N_1

I/O

L16P_2

GCLK14

VCCO_2

I/O

L18N_2

GCLK3

I/O

L19P_2

GND

I/O

L22P_2

AWAKE

VCCO_2

I/O

L27N_2

I/O

L30P_2

VCCAUX

I/O

L02N_1

LDC0

I/O

L16N_2

GCLK15

I/O

L18P_2

GCLK2

I/O

L19N_2

INPUT

I/O

L22N_2

DOUT

I/O

L23P_2

I/O

L23N_2

I/O

L27P_2

I/O

L30N_2

DONE

GND

Bank 2

Right Half of CS484

Package (Top View)

Figure 16: CS484 Package Footprint (Top ViewâRight Half)

DS610 (v3.0) October 4, 2010

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Product Specification

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