English
Language : 

XC3SD3400A-4FGG676C Datasheet, PDF (17/101 Pages) Xilinx, Inc – Spartan-3A DSP FPGA Family Data Sheet
◁
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
Differential Output Pairs
X-Ref Target - Figure 4
Internal
Logic
VOUTP
P
N
VOUTN
Differential
I/O Pair Pins
VOUTN
VOUTP
GND level
50%
VOCM
VOD
VOH
VOL
VOCM = Output common mode voltage =
VOUTP + VOUTN
2
VOD = Output differential voltage = VOUTP - VOUTN
VOH = Output voltage indicating a High logic level
VOL = Output voltage indicating a Low logic level
DS312-3_03_090510
Figure 4: Differential Output Voltages
Table 13: DC Characteristics of User I/Os Using Differential Signal Standards
IOSTANDARD Attribute
Min (mV)
LVDS_25
247
LVDS_33
247
BLVDS_25
240
MINI_LVDS_25
300
MINI_LVDS_33
300
RSDS_25
100
RSDS_33
100
TMDS_33
400
PPDS_25
100
PPDS_33
100
DIFF_HSTL_I_18
–
DIFF_HSTL_II_18
–
DIFF_HSTL_III_18
–
DIFF_HSTL_I
–
DIFF_HSTL_III
–
DIFF_SSTL18_I
–
DIFF_SSTL18_II
–
DIFF_SSTL2_I
–
DIFF_SSTL2_II
–
DIFF_SSTL3_I
–
DIFF_SSTL3_II
–
VOD
Typ (mV)
350
350
350
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Max (mV)
454
454
460
600
600
400
400
800
400
400
–
–
–
–
–
–
–
–
–
–
–
Min (V)
1.125
1.125
–
1.0
1.0
1.0
1.0
VCCO – 0.405
0.5
0.5
–
–
–
–
–
–
–
–
–
–
–
VOCM
Typ (V)
–
–
1.30
–
–
–
–
–
0.8
0.8
–
–
–
–
–
–
–
–
–
–
–
Max (V)
1.375
1.375
–
1.4
1.4
1.4
1.4
VCCO – 0.190
1.4
1.4
–
–
–
–
–
–
–
–
–
–
–
VOH
Min (V)
–
–
–
–
–
–
–
–
–
–
VCCO – 0.4
VCCO – 0.4
VCCO – 0.4
VCCO – 0.4
VCCO – 0.4
VTT + 0.475
VTT + 0.603
VTT + 0.61
VTT + 0.81
VTT + 0.6
VTT + 0.8
VOL
Max (V)
–
–
–
–
–
–
–
–
–
–
0.4
0.4
0.4
0.4
0.4
VTT – 0.475
VTT – 0.603
VTT – 0.61
VTT – 0.81
VTT - 0.6
VTT - 0.8
Notes:
1. The numbers in this table are based on the conditions set forth in Table 7 and Table 12.
2. See "External Termination Requirements for Differential I/O."
3. Output voltage measurements for all differential standards are made with a termination resistor (RT) of 100Ω across the N and P pins of the differential signal pair.
4. At any given time, no more than two of the following differential output standards can be assigned to an I/O bank: LVDS_25, RSDS_25, MINI_LVDS_25, PPDS_25 when
VCCO=2.5V, or LVDS_33, RSDS_33, MINI_LVDS_33, TMDS_33, PPDS_33 when VCCO = 3.3V
DS610 (v3.0) October 4, 2010
www.xilinx.com
Product Specification
17
 ▷