XC3SD3400A-4FGG676C Datasheet, PDF (101/101 Pages) Xilinx, Inc – Spartan-3A DSP FPGA Family Data Sheet

Spartan-3A DSP FPGA Family: Pinout Descriptions
Revision History
The following table shows the revision history for this document.
Date
04/02/07
05/25/07
06/18/07
07/16/07
06/02/08
03/11/09
10/04/10
Version
1.0
1.1
1.2
2.0
2.1
2.2
3.0
Revision
Initial Xilinx release.
Updates to Table 59, Table 63, Table 64, Table 65, Table 66, Table 67, Table 68, Table 69. Corrected
VREF pins in XC3S1800A FG676 (Table 70). Updated FG676 package footprints for XC3SD1800A
FPGA (Figure 16) and XC3SD3400A FPGA (Figure 17). Minor edits.
Updated for Production release.
Added Low-power options. Added advance thermal data to Table 62.
Added Package Overview section. Updated Thermal Characteristics in Table 62. Corrected name for
AB14 in CS484 in Table 63. Updated links.
Corrected bank designation for SUSPEND to VCCAUX.
Revision update to match other data sheet modules.
DS610 (v3.0) October 4, 2010
www.xilinx.com
Product Specification
101