XC3SD3400A-4FGG676C Datasheet, PDF(51/101 Page) Xilinx, Inc – Spartan-3A DSP FPGA Family Data Sheet

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XC3SD3400A-4FGG676C Datasheet, PDF (51/101 Pages) Xilinx, Inc – Spartan-3A DSP FPGA Family Data Sheet

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Spartan-3A DSP FPGA Family: DC and Switching Characteristics

Configuration and JTAG Timing

General Configuration Power-On/Reconfigure Timing

X-Ref Target - Figure 10

VCCINT

(Supply)

1.0V

1.2V

VCCAUX

(Supply)

2.0V

2.5V

3.3V

VCCO Bank 2

(Supply)

PROG_B

(Input)

INIT_B

(Open-Drain)

CCLK

(Output)

2.0V

TPOR

TPROG

TPL

TICCK

2.5V

3.3V

DS529-3_01_052708

Notes:

1. The VCCINT, VCCAUX, and VCCO supplies can be applied in any order.

2. The Low-going pulse on PROG_B is optional after power-on but necessary for reconfiguration without a power cycle.

3. The rising edge of INIT_B samples the voltage levels applied to the mode pins (M0 - M2).

Figure 10: Waveforms for Power-On and the Beginning of Configuration

Table 45: Power-On Timing and the Beginning of Configuration

Symbol

TPOR(2)

TPROG

TPL(2)

TINIT

TICCK(3)

Description

The time from the application of VCCINT, VCCAUX, and VCCO

Bank 2 supply voltage ramps (whichever occurs last) to the

rising transition of the INIT_B pin

The width of the low-going pulse on the PROG_B pin

The time from the rising edge of the PROG_B pin to the

rising transition on the INIT_B pin

Minimum Low pulse width on INIT_B output

The time from the rising edge of the INIT_B pin to the

generation of the configuration clock signal at the CCLK

output pin

Device

All

All Speed Grades

Min

Max

Units

0.5

Âµs

300

0.5

Âµs

Notes:

1. The numbers in this table are based on the operating conditions set forth in Table 7. This means power must be applied to all VCCINT, VCCO,

and VCCAUX lines.

2. Power-on reset and the clearing of configuration memory occurs during this period.

3. This specification applies only to the Master Serial, SPI, and BPI modes.

4. For details on configuration, see UG332 Spartan-3 Generation Configuration User Guide.

DS610 (v3.0) October 4, 2010

www.xilinx.com

Product Specification

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