SM320F2808-EP Datasheet, PDF (99/118 Pages) Texas Instruments – Digital Signal Processors

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ADCSOCAO
or
ADCSOCBO
SM320F2808-EP, SM320F2806-EP
SM320F2801-EP
Digital Signal Processors
SGLS316A – MARCH 2006 – REVISED FEBRUARY 2007
t_w(ADCSOCAL)
Figure 6-16. ADCSOCAO or ADCSOCBO Timing
6.9.3 External Interrupt Timing
XNMI, XINT1, XINT2
Address bus
(internal)
t_w(INT)
Figure 6-17. External Interrupt Timing
t_d(INT)
Interrupt Vector
Table 6-29. External Interrupt Timing Requirements⁽¹⁾
TEST CONDITIONS
t_w(INT)
Pulse duration, INT input low/high
Synchronous
With qualifier
(1) For an explanation of the input qualifier parameters, see Table 6-13.
MIN
1t_c(SCO)
1t_c(SCO) + t_w(IQSW)
Table 6-30. External Interrupt Switching Characteristics⁽¹⁾
MAX
UNIT
cycles
cycles
PARAMETER
t_d(INT)
Delay time, INT low/high to interrupt-vector fetch
(1) For an explanation of the input qualifier parameters, see Table 6-13.
MIN
MAX
t_w(IQSW) + 12t_c(SCO)
UNIT
cycles
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Electrical Specifications
99