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SM320F2808-EP Datasheet, PDF (21/118 Pages) Texas Instruments – Digital Signal Processors | |||
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3.1 Memory Map
SM320F2808-EP, SM320F2806-EP
SM320F2801-EP
Digital Signal Processors
SGLS316A â MARCH 2006 â REVISED FEBRUARY 2007
Block Start
Address
Data Space
Prog Space
0x00 0000
ÃÃÃÃÃÃ 0x00 0400
M0 SARAM (1 K y 16)
M1 SARAM (1 K y 16)
ÃÃÃÃÃÃ 0x00 0800
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x00 0D00
ÃÃÃÃÃÃÃÃÃÃÃ 0x00 0E00
Peripheral Frame 0
PIE Vector â RAM
(256 x 16)
(Enabled if ENPIE = 1)
ÃÃÃÃÃÃÃÃÃÃÃ 0x00 6000
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x00 7000
Peripheral Frame 1
(protected)
Peripheral Frame 2
(protected)
0x00 8000
0x00 9000
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x00 A000
ÃÃÃÃÃÃÃÃÃÃÃ 0x00 C000
L0 SARAM (0-wait)
(4 k y 16, Secure Zone, Dual Mapped)
L1 SARAM (0-wait)
(4 k y 16, Secure Zone, Dual Mapped)
H0 SARAM (0-wait)
(8 k y 16, Dual Mapped)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x3D 7800
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x3D 7C00
OTP
(1 k y 16, Secure Zone)
0x3E 8000
FLASH
(64 k y 16, Secure Zone)
0x3F 7FF8
128-bit Password
0x3F 8000
L0 SARAM (0-wait)
0x3F 9000
ÃÃÃÃÃÃÃÃÃÃÃ 0x3F A000
ÃÃÃÃÃÃÃÃÃÃÃ 0x3F C000
ÃÃÃÃÃÃÃÃÃÃÃ 0x3F F000
ÃÃÃ ÃÃÃÃÃÃÃÃÃÃÃ 0x3FFFC0
ÃÃÃÃÃÃÃÃÃReserved
(4 k y 16, Secure Zone, Dual Mapped)
L1 SARAM (0-wait)
(4 k y 16, Secure Zone, Dual Mapped)
H0 SARAM (0-wait)
(8 k y 16, Dual Mapped)
Boot ROM (4 k y 16)
Vectors (32 y 32)
(enabled if VMAP = 1, ENPIE = 0)
A. Memory blocks are not to scale.
B. Peripheral Frame 0, Peripheral Frame 1, and Peripheral Frame 2 memory maps are restricted to data memory only.
User program cannot access these memory maps in program space.
C. â Protectedâ means the order of Write followed by Read operations is preserved rather than the pipeline order.
D. Certain memory ranges are EALLOW protected against spurious writes after configuration.
Figure 3-2. F2808 Memory Map
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Functional Overview
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