SM320F2808-EP Datasheet, PDF (97/118 Pages) Texas Instruments – Digital Signal Processors

www.ti.com
SM320F2808-EP, SM320F2806-EP
SM320F2801-EP
Digital Signal Processors
SGLS316A – MARCH 2006 – REVISED FEBRUARY 2007
Table 6-20. ePWM Timing Requirements⁽¹⁾
TEST CONDITIONS
t_w(SYCIN)
Sync input pulse width
Asynchronous
Synchronous
With input qualifier
(1) For an explanation of the input qualifier parameters, see Table 6-13.
MIN
2t_c(SCO)
2t_c(SCO)
1t_c(SCO) + t_w(IQSW)
MAX
UNIT
cycles
cycles
cycles
Table 6-21. ePWM Switching Characteristics
t_w(PWM)
t_w(SYNCOUT)
t_d(PWM)tza
t_d(TZ-PWM)HZ
PARAMETER
Pulse duration, PWMx output high/low
Sync output pulse width
Delay time, trip input active to PWM forced high
Delay time, trip input active to PWM forced low
Delay time, trip input active to PWM Hi-Z
6.9.2 Trip-Zone Input Timing
TEST CONDITIONS
no pin load
MIN
20
8t_c(SCO)
MAX
25
UNIT
ns
cycles
ns
20 ns
XCLKOUT^(A)
t_w(TZ)
TZ
t_d(TZ-PWM)HZ
PWM^(B)
A. TZ - TZ1, TZ2, TZ3, TZ4, TZ5, TZ6
B. PWM refers to all the PWM pins in the device. The state of the PWM pins after TZ is taken high depends on the PWM
recovery software.
Figure 6-15. PWM Hi-Z Characteristics
Table 6-22. Trip-Zone input Timing Requirements⁽¹⁾
t_w(TZ)
Pulse duration, TZx input low
Asynchronous
Synchronous
With input qualifier
(1) For an explanation of the input qualifier parameters, see Table 6-13.
Table 6-23 shows the high-resolution PWM switching characteristics.
MIN
1t_c(SCO)
2t_c(SCO)
1t_c(SCO) + t_w(IQSW)
MAX
UNIT
cycles
cycles
cycles
Submit Documentation Feedback
Electrical Specifications
97