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SM320F2808-EP Datasheet, PDF (23/118 Pages) Texas Instruments – Digital Signal Processors | |||
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www.ti.com
SM320F2808-EP, SM320F2806-EP
SM320F2801-EP
Digital Signal Processors
SGLS316A â MARCH 2006 â REVISED FEBRUARY 2007
Block Start
Address
0x00 0000
Data Space
Prog Space
0x00 0400
ÃÃÃÃÃÃÃÃÃÃÃÃ 0x00 0800
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x00 0D00
ÃÃÃÃÃÃÃÃÃÃ 0x00 0E00
ÃÃÃÃÃÃÃÃÃÃ 0x00 6000
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x00 7000
ÃÃÃÃÃÃÃÃÃÃ 0x00 8000
ÃÃÃÃÃÃÃÃÃÃ 0x00 9000
M0 SARAM (1K y 16)
M1 SARAM (1K y 16)
Peripheral Frame 0
PIE Vector â RAM
(256 x 16)
(Enabled if ENPIE = 1)
Peripheral Frame 1
(protected)
Peripheral Frame 2
(protected)
L0 SARAM (0-wait)
(4K y 16, Secure Zone, Dual Mapped)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x3D 7800
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x3D 7C00
OTP (F2801/9501 Only)(A)
(1K y 16, Secure Zone)
0x3F 4000
FLASH (F2801/9501) or ROM (C2801)
0x3F 7FF8
ÃÃÃÃÃÃÃÃÃÃ 0x3F 8000
ÃÃÃÃÃÃÃÃÃÃ 0x3F 9000
(16K y 16, Secure Zone)
128-bit Password
L0 (0-wait)
(4K y 16, Secure Zone, Dual Mapped)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0x3F F000
Boot ROM (4K y 16)
0x3F FFC0
ÃÃÃÃÃÃÃÃÃÃÃÃ Reserved
Vectors (32 y 32)
(enabled if VMAP = 1, ENPIE = 0)
A. Memory blocks are not to scale.
B. Peripheral Frame 0, Peripheral Frame 1, and Peripheral Frame 2 memory maps are restricted to data memory only.
User program cannot access these memory maps in program space.
C. â Protectedâ means the order of Write followed by Read operations is preserved rather than the pipeline order.
D. Certain memory ranges are EALLOW protected against spurious writes after configuration.
Figure 3-4. F2801/9501 Memory Map
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Functional Overview
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