SM320F2808-EP Datasheet, PDF (7/118 Pages) Texas Instruments – Digital Signal Processors

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SM320F2808-EP, SM320F2806-EP
SM320F2801-EP
Digital Signal Processors
SGLS316A – MARCH 2006 – REVISED FEBRUARY 2007
6-6 Input Clock Frequency ........................................................................................................... 86
6-7 XCLKIN Timing Requirements - PLL Enabled ................................................................................ 86
6-8 XCLKIN Timing Requirements - PLL Disabled................................................................................ 86
6-9 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ......................................................... 87
6-10 Power Management and Supervisory Circuit Solutions...................................................................... 88
6-11 Reset (XRS) Timing Requirements ............................................................................................ 90
6-12 General-Purpose Output Switching Characteristics .......................................................................... 91
6-13 General-Purpose Input Timing Requirements................................................................................. 92
6-14 IDLE Mode Timing Requirements............................................................................................... 94
6-15 IDLE Mode Switching Characteristics .......................................................................................... 94
6-16 STANDBY Mode Timing Requirements........................................................................................ 94
6-17 STANDBY Mode Switching Characteristics .................................................................................. 95
6-18 HALT Mode Timing Requirements.............................................................................................. 95
6-19 HALT Mode Switching Characteristics ........................................................................................ 96
6-20 ePWM Timing Requirements .................................................................................................... 97
6-21 ePWM Switching Characteristics................................................................................................ 97
6-22 Trip-Zone input Timing Requirements.......................................................................................... 97
6-23 High Resolution PWM Characteristics at SYSCLKOUT = (60 - 100 MHz) ................................................ 98
6-24 Enhanced Capture (eCAP) Timing Requirement ............................................................................. 98
6-25 eCAP Switching Characteristics................................................................................................. 98
6-26 Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements ..................................................... 98
6-27 eQEP Switching Characteristics ................................................................................................ 98
6-28 External ADC Start-of-Conversion Switching Characteristics ............................................................... 98
6-29 External Interrupt Timing Requirements ....................................................................................... 99
6-30 External Interrupt Switching Characteristics ................................................................................... 99
6-31 I2C Timing ....................................................................................................................... 100
6-32 SPI Master Mode External Timing (Clock Phase = 0) ...................................................................... 101
6-33 SPI Master Mode External Timing (Clock Phase = 1) ...................................................................... 103
6-34 SPI Slave Mode External Timing (Clock Phase = 0)........................................................................ 104
6-35 SPI Slave Mode External Timing (Clock Phase = 1)........................................................................ 105
6-36 ADC Electrical Characteristics (over recommended operating conditions) .............................................. 107
6-37 ADC Power-Up Delays.......................................................................................................... 108
6-38 Current Consumption for Different ADC Configurations (at 12.5-MHz ADCCLK)....................................... 108
6-39 Sequential Sampling Mode Timing............................................................................................ 110
6-40 Simultaneous Sampling Mode Timing ........................................................................................ 111
6-41 Flash Endurance................................................................................................................. 113
6-42 Flash Parameters at 100-MHz SYSCLKOUT................................................................................ 113
6-43 Flash/OTP Access Timing...................................................................................................... 113
6-44 Minimum Required Wait-States at Different Frequencies .................................................................. 114
7-1 F280x Thermal Model 100-pin GGM Results ................................................................................ 115
7-2 F280x Thermal Model 100-pin PZ Results ................................................................................... 115
List of Tables
7