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| SM320F2808-EP Datasheet, PDF (34/118 Pages) Texas Instruments – Digital Signal Processors | |||
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SM320F2808-EP, SM320F2806-EP
SM320F2801-EP
Digital Signal Processors
SGLS316A â MARCH 2006 â REVISED FEBRUARY 2007
www.ti.com
3.5 Interrupts
Figure 3-5 shows how the various interrupt sources are multiplexed within the 280x devices.
WAKEINT
Peripherals
(SPI, SCI, I2C, eCAN, ePWM, eCAP, eQEP, ADC)
WDINT
LPMINT
Watchdog
Low Power Modes
INT1 to
INT12
C28
CPU
INT14
INT13
XINT1
Interrupt Control
XINT1CR(15:0)
XINT1CTR(15:0)
XINT1
XINT2
ADC
Interrupt Control
XINT2CR(15:0)
XINT2CTR(15:0)
GPIOXINT1SEL(4:0)
XINT2SOC
XINT2
GPIOXINT2SEL(4:0)
TINT0
TINT2
TINT1
CPU TIMER 0
CPU TIMER 2 (for TI/RTOS)
CPU TIMER 1 (for TI)
int13_select
nmi_select
XNMI_XINT13
Interrupt Control
NMI
XNMICR(15:0)
1
XNMICTR(15:0)
GPIO0.int
GPIO31.int
GPIO
MUX
GPIOXNMISEL(4:0)
Figure 3-5. External and PIE Interrupt Sources
Eight PIE block interrupts are grouped into one CPU interrupt. In total, 12 CPU interrupt groups, with 8
interrupts per group equals 96 possible interrupts. On the 280x, 43 of these are used by peripherals as
shown in Table 3-10.
34
Functional Overview
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