English
Language : 

SM320F2808-EP Datasheet, PDF (83/118 Pages) Texas Instruments – Digital Signal Processors
www.ti.com
SM320F2808-EP, SM320F2806-EP
SM320F2801-EP
Digital Signal Processors
SGLS316A – MARCH 2006 – REVISED FEBRUARY 2007
Table 6-3. F2801/UCD9501 Current Consumption by Power-supply Pins at 100-MHz SYSCLKOUT
(continued)
MODE
TEST CONDITIONS
IDLE
STANDBY
HALT
Flash is powered down.
XCLKOUT is turned off.
The following peripheral
clocks are enabled:
• eCAN-A
• SCI-A
• SPI-A
• I2C
Flash is powered down.
Peripheral clocks are off.
Flash is powered down.
Peripheral clocks are off.
Input clock is disabled.
IDD
TYP (4)
MAX
IDDIO (1)
TYP (4)
MAX
IDD3VFL
TYP(4) MAX
IDDA18 (2)
TYP (4)
MAX
IDDA33 (3)
TYP (4)
MAX
75 mA 90 mA 500 µA 2 mA
2 µA 10 µA 5 µA
50 µA 15 µA 30 µA
6 mA 12 mA 100 µA 500 µA 2 µA 10 µA 5 µA
70 µA
60 µA 120 µA 2 µA 10 µA 5 µA
50 µA 15 µA 30 µA
50 µA 15 µA 30 µA
6.4.1 Reducing Current Consumption
280x devices have a richer peripheral mix compared to the 281x family. While the McBSP has been
removed, the following new peripherals have been added on the 280x:
• 3 SPI modules
• 1 CAN module
• 1 I2C module
The two event manager modules of the 281x have been enhanced and replaced with separate ePWM (6),
eCAP (4) and eQEP (2) modules, providing tremendous flexibility in applications. Like 281x, 280x DSPs
incorporate a unique method to reduce the device current consumption. Since each peripheral unit has an
individual clock-enable bit, significant reduction in current consumption can be achieved by turning off the
clock to any peripheral module that is not used in a given application. Furthermore, any one of the three
low-power modes could be taken advantage of to reduce the current consumption even further. Table 6-4
indicates the typical reduction in current consumption achieved by turning off the clocks.
Table 6-4. Typical Current Consumption by Various
Peripherals (at 100 MHz)(1)
PERIPHERAL
MODULE
ADC
IDD CURRENT
REDUCTION (mA)
8 (2)
I2C
5
eQEP
5
ePWM
5
eCAP
2
SCI
4
SPI
5
eCAN
11
(1) All peripheral clocks are disabled upon reset. Writing to/reading
from peripheral registers is possible only after the peripheral clocks
are turned on.
(2) This number represents the current drawn by the digital portion of
the ADC module. Turning off the clock to the ADC module results in
the elimination of the current drawn by the analog portion of the
ADC (IDDA18) as well.
Submit Documentation Feedback
Electrical Specifications
83