SMJ320C6203 Datasheet, PDF (69/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
XHOLD/XHOLDA TIMING
SGUS033 – FEBRUARY 2002
timing requirements for expansion bus arbitration (internal arbiter enabled)^† (see Figure 44)
NO.
MIN MAX UNIT
3 toh(XHDAH-XHDH) Output hold time, XHOLD high after XHOLDA high
*This parameter is not production tested.
† _{P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.}
*P
ns
switching characteristics over recommended operating conditions for expansion bus arbitration
(internal arbiter enabled)^†‡ (see Figure 44)
NO.
PARAMETER
1 td(XHDH-XBHZ)
Delay time, XHOLD high to expansion bus high impedance
2 td(XBHZ-XHDAH)
Delay time, expansion bus high impedance to XHOLDA high
4 td(XHDL-XHDAL)
Delay time, XHOLD low to XHOLDA low
5 td(XHDAL-XBLZ)
Delay time, XHOLDA low to expansion bus low impedance
*This parameter is not production tested.
† _{P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.}
‡ _{Expansion bus consists of XBE[3:0]/XA[5:2], XAS, XW/R, and XBLAST.}
§ _{All pending expansion bus transactions are allowed to complete before XHOLDA is asserted.}
MIN
*3P
*0
*3P
*0
MAX
§
*2P
*2P
UNIT
ns
ns
ns
ns
XHOLD (input)
DSP Owns Bus
External Requestor
Owns Bus
DSP Owns Bus
3
XHOLDA (output)
2
4
1
Expansion bus^†
C6203B/03C
5
C6203B/03C
† _{Expansion bus consists of XBE[3:0]/XA[5:2], XAS, XW/R, and XBLAST.}
Figure 44. Expansion Bus Arbitration—Internal Arbiter Enabled
switching characteristics over recommended operating conditions for expansion bus arbitration
(internal arbiter disabled)^† (see Figure 45)
NO.
PARAMETER
1 td(XHDAH-XBLZ)
2 td(XBHZ-XHDL)
Delay time, XHOLDA high to Expansion bus low impedance^‡
Delay time, expansion bus high impedance to XHOLD low^‡
*This parameter is not production tested.
† _{P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.}
‡ _{Expansion bus consists of XBE[3:0]/XA[5:2], XAS, XW/R, and XBLAST.}
XHOLD (output)
MIN
*2P
*0
MAX
*2P + 10
*2P
UNIT
ns
ns
2
XHOLDA (input)
Expansion bus^†
† _{Expansion bus consists of XBE[3:0]/XA[5:2], XAS, XW/R, and XBLAST.}
1
C6203B/03C
Figure 45. Expansion Bus Arbitration—Internal Arbiter Disabled
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