SMJ320C6203 Datasheet, PDF (57/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS033 – FEBRUARY 2002
EXPANSION BUS ASYNCHRONOUS PERIPHERAL TIMING
timing requirements for asynchronous peripheral cycles^{†‡§¶} (see Figure 33–Figure 36)
NO.
MIN MAX UNIT
3 tsu(XDV-XREH)
Setup time, XDx valid before XRE high
4 th(XREH-XDV)
Hold time, XDx valid after XRE high
6 tsu(XRDYH-XREL) Setup time, XRDY high before XRE low
7 th(XREL-XRDYH) Hold time, XRDY high after XRE low
4.5
ns
2.5
ns
–[(RST – 3) x P – 6]
ns
(RST – 3) x P + 2
ns
9 tsu(XRDYL-XREL) Setup time, XRDY low before XRE low
10 th(XREL-XRDYL) Hold time, XRDY low after XRE low
–[(RST – 3) x P – 6]
ns
(RST – 3) x P + 2
ns
11 tw(XRDYH)
Pulse width, XRDY high
*2P
ns
15 tsu(XRDYH-XWEL) Setup time, XRDY high before XWE low
16 th(XWEL-XRDYH) Hold time, XRDY high after XWE low
–[(WST – 3) x P – 6]
ns
(WST – 3) x P + 2
ns
18 tsu(XRDYL-XWEL) Setup time, XRDY low before XWE low
–[(WST – 3) x P – 6]
ns
19 th(XWEL-XRDYL) Hold time, XRDY low after XWE low
(WST – 3) x P + 2
ns
*This parameter is not production tested.
† _{To ensure data setup time, simply program the strobe width wide enough. XRDY is internally synchronized. If XRDY does meet setup or hold}
time, it may be recognized in the current cycle or the next cycle. Thus, XRDY can be an asynchronous input.
‡ _{RS = Read Setup, RST = Read Strobe, RH = Read Hold, WS = Write Setup, WST = Write Strobe, WH = Write Hold. These parameters are}
programmed via the expansion bus XCE space control registers.
§ _{P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.}
¶ _{The sum of RS and RST (or WS and WST) must be a minimum of 4 in order to use XRDY input to extend strobe width.}
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