SMJ320C6203 Datasheet, PDF (62/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS033 – FEBRUARY 2002
EXPANSION BUS SYNCHRONOUS HOST-PORT TIMING (CONTINUED)
XCLKIN
XCS
XAS
XCNTL
XW/R^†
XW/R^†
XBE[3:0]/XA[5:2]^‡
XBLAST^§
XBLAST^§
XD[31:0]
XRDY^¶
1
2
3
4
5
6
7
8
7
8
11
20
9
10
9
10
12
13
14
D1
D2
D3
D4
21
15
15
† _{XW/R input/output polarity selected at boot}
‡ _{XBE[3:0]/XA[5:2] operate as byte-enables XBE[3:0] during host-port accesses.}
§ _{XBLAST input polarity selected at boot}
¶ _{XRDY operates as active-low ready input/output during host-port accesses.}
Figure 37. External Host as Bus Master—Read
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