SMJ320C6203 Datasheet, PDF (47/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS033 – FEBRUARY 2002
SYNCHRONOUS-BURST MEMORY TIMING (CONTINUED)
CLKOUT2
CEx
BE[3:0]
1
2
3
4
BE1
BE2 BE3 BE4
EA[21:2]
ED[31:0]
SDCAS/SSADS^†
SDRAS/SSOE^†
5
6
A1
A2
A3
A4
78
Q1 Q2
Q3
Q4
9
10
11
12
SDWE/SSWE^†
† _{SDCAS/SSADS, SDRAS/SSOE, and SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM accesses.}
Figure 19. SBSRAM Read Timing
CLKOUT2
1
2
CEx
BE[3:0]
3
4
BE1
BE2
BE3
BE4
EA[21:2]
5
6
A1
A2
A3
A4
ED[31:0]
SDCAS/SSADS^†
13
14
Q1
Q2
Q3
Q4
9
10
SDRAS/SSOE^†
SDWE/SSWE^†
15
16
† _{SDCAS/SSADS, SDRAS/SSOE, and SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM accesses.}
Figure 20. SBSRAM Write Timing
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