SMJ320C6203 Datasheet, PDF (49/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SYNCHRONOUS DRAM TIMING (CONTINUED)
SGUS033 – FEBRUARY 2002
READ
READ
READ
CLKOUT2
CEx
BE[3:0]
EA[15:2]
ED[31:0]
SDA10
1
2
3
4
BE1
BE2
BE3
5
6
CA1
CA2
CA3
7
8
D1
D2
D3
15
16
SDRAS/SSOE^†
9
10
SDCAS/SSADS^†
SDWE/SSWE^†
† _{SDCAS/SSADS, SDRAS/SSOE, and SDWE/SSWE operate as SDCAS, SDRAS, and SDWE, respectively, during SDRAM accesses.}
Figure 21. Three SDRAM READ Commands
CLKOUT2
CEx
BE[3:0]
EA[15:2]
ED[31:0]
SDA10
WRITE
1
WRITE
3
BE1
5
CA1
11
D1
15
4
BE2
6
CA2
12
D2
WRITE
2
BE3
CA3
D3
16
SDRAS/SSOE^†
9
10
SDCAS/SSADS^†
13
14
SDWE/SSWE^†
† _{SDCAS/SSADS, SDRAS/SSOE, and SDWE/SSWE operate as SDCAS, SDRAS, and SDWE, respectively, during SDRAM accesses.}
Figure 22. Three SDRAM WRT Commands
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