SMJ320C6203 Datasheet, PDF (1/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

D High-Performance Fixed-Point Digital
Signal Processor (DSP) – SMJ320C62x
– 5-ns Instruction Cycle Time
– 200-MHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 1600 Million Instructions Per Second
(MIPS)
D 429-Pin Ball Grid Array (BGA) Package
(GLP Suffix)
D VelociTI Advanced Very-Long-Instruction-
Word (VLIW) C62x DSP Core
– Eight Highly Independent Functional
Units:
– Six Arithmetic Logic Units (ALUs)
(32-/40-Bit)
– Two 16-Bit Multipliers (32-Bit Result)
– Load-Store Architecture With 32 32-Bit
General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
D Instruction Set Features
– Byte-Addressable (8-, 16-, 32-Bit Data)
– 8-Bit Overflow Protection
– Saturation
– Bit-Field Extract, Set, Clear
– Bit-Counting
– Normalization
D 7M-Bit On-Chip SRAM
– 3M-Bit Internal Program/Cache
(96K 32-Bit Instructions)
– 4M-Bit Dual-Access Internal Data
(512K Bytes)
– Organized as Two 256K-Byte Blocks
for Improved Concurrency
D Flexible Phase-Locked-Loop (PLL) Clock
Generator
SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS033 – FEBRUARY 2002
D 32-Bit External Memory Interface (EMIF)
– Glueless Interface to Synchronous
Memories: SDRAM or SBSRAM
– Glueless Interface to Asynchronous
Memories: SRAM and EPROM
– 52M-Byte Addressable External Memory
Space
D Four-Channel Bootloading
Direct-Memory-Access (DMA) Controller
With an Auxiliary Channel
D 32-Bit Expansion Bus
– Glueless/Low-Glue Interface to Popular
PCI Bridge Chips
– Glueless/Low-Glue Interface to Popular
Synchronous or Asynchronous
Microprocessor Buses
– Master/Slave Functionality
– Glueless Interface to Synchronous FIFOs
and Asynchronous Peripherals
D Three Multichannel Buffered Serial Ports
(McBSPs)
– Direct Interface to T1/E1, MVIP, SCSA
Framers
– ST-Bus-Switching Compatible
– Up to 256 Channels Each
– AC97-Compatible
– Serial-Peripheral Interface (SPI)
Compatible (Motorola)
D Two 32-Bit General-Purpose Timers
D IEEE-1149.1 (JTAG^†)
Boundary-Scan-Compatible
D 0.15-µm/5-Level Metal Process
– CMOS Technology
D 3.3-V I/Os, 1.5-V Internal
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SMJ320C62x, VelociTI, and C62x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
All trademarks are the property of their respective owners.
† _{IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.}
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2002, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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