SMJ320C6203 Datasheet, PDF (20/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS033 – FEBRUARY 2002
Signal Descriptions (Continued)
SIGNAL
NAME
PIN
NO.
GNP
TYPE^†
DESCRIPTION
POWER-DOWN STATUS
PD
V3
O Power-down modes 2 or 3 (active if high)
EXPANSION BUS
XCLKIN
C9
I
Expansion bus synchronous host interface clock input
XFCLK
B9
O Expansion bus FIFO interface clock output
XD31
D11
XD30
B13
XD29
F12
XD28
C13
XD27
D12
XD26
A14
XD25
B14
XD24
F13
XD23
B15
XD22
C15
XD21
D13
XD20
B16
XD19
B17
Expansion bus data
• Used for transfer of data, address, and control
• Also controls initialization of DSP modes and expansion bus at reset
[Note: For more information on pin control and boot configuration fields, see the Boot Modes
and Configuration chapter of the TMS320C6000 Peripherals Reference Guide (literature
number SPRU190)]
XD18
XD17
XD16
XD15
XD14
XD13
XD12
XD11
XD10
D14
XD[30:16]– XCE[3:0] memory type
F15
XD13 – XBLAST polarity
C17
I/O/Z
G14
XD12
XD11
XD10
– XW/R polarity
– Asynchronous or synchronous host operation
– Arbitration mode (internal or external)
D17
XD9 – FIFO mode
C18
XD8 – Little endian/big endian
XD7 – SCRT select
E18
XD[4:0] – Boot mode
D18
G15
All other expansion bus data pins not listed should be pulled down.
XD9
D19
For proper operation, XD7 must be pulled down with a 10-kΩ resistor. The board design should be wired
XD8
F16
such that a pullup or pulldown resistor can be used on XD7 for future applications.
XD7
F19
XD6
E20
XD5
G16
XD4
H19
XD3
G20
XD2
J18
XD1
H20
XD0
H21
† _{I = Input, O = Output, Z = High Impedance, S = Supply Voltage, GND = Ground}
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