SMJ320C6203 Datasheet, PDF (15/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS033 – FEBRUARY 2002
interrupt sources and interrupt selector
The C62x DSP core supports 16 prioritized interrupts, which are listed in Table 14. The highest-priority interrupt
is INT_00 (dedicated to RESET) while the lowest-priority interrupt is INT_15. The first four interrupts
(INT_00–INT_03) are non-maskable and fixed. The remaining interrupts (INT_04–INT_15) are maskable and
default to the interrupt source specified in Table 14. The interrupt source for interrupts 4–15 can be programmed
by modifying the selector value (binary value) in the corresponding fields of the Interrupt Selector Control
registers: MUXH (address 0x019C0000) and MUXL (address 0x019C0004).
CPU
INTERRUPT
NUMBER
INT_00^†
INT_01^†
INT_02^†
INT_03^†
INT_04^‡
INT_05^‡
INT_06^‡
INT_07^‡
INT_08^‡
INT_09^‡
INT_10^‡
INT_11^‡
INT_12^‡
INT_13^‡
INT_14^‡
INT_15^‡
–
–
–
–
–
–
–
–
INTERRUPT
SELECTOR
CONTROL
REGISTER
–
–
–
–
MUXL[4:0]
MUXL[9:5]
MUXL[14:10]
MUXL[20:16]
MUXL[25:21]
MUXL[30:26]
MUXH[4:0]
MUXH[9:5]
MUXH[14:10]
MUXH[20:16]
MUXH[25:21]
MUXH[30:26]
–
–
–
–
–
–
–
–
Table 14. C6203 DSP Interrupts
SELECTOR
VALUE
(BINARY)
INTERRUPT
EVENT
INTERRUPT SOURCE
–
–
–
–
00100
00101
00110
00111
01000
01001
00011
01010
01011
00000
00001
00010
01100
01101
01110
01111
10000
10001
10010
10011 – 11111
RESET
NMI
Reserved
Reserved
EXT_INT4
EXT_INT5
EXT_INT6
EXT_INT7
DMA_INT0
DMA_INT1
SD_INT
DMA_INT2
DMA_INT3
DSP_INT
TINT0
TINT1
XINT0
RINT0
XINT1
RINT1
Reserved
XINT2
RINT2
Reserved
Reserved. Do not use.
Reserved. Do not use.
External interrupt pin 4
External interrupt pin 5
External interrupt pin 6
External interrupt pin 7
DMA channel 0 interrupt
DMA channel 1 interrupt
EMIF SDRAM timer interrupt
DMA channel 2 interrupt
DMA channel 3 interrupt
Host-processor-to-DSP interrupt
Timer 0 interrupt
Timer 1 interrupt
McBSP0 transmit interrupt
McBSP0 receive interrupt
McBSP1 transmit interrupt
McBSP1 receive interrupt
Reserved. Not used.
McBSP2 transmit interrupt
McBSP2 receive interrupt
Reserved. Do not use.
† _{Interrupts INT_00 through INT_03 are non-maskable and fixed.}
‡ _{Interrupts INT_04 through INT_15 are programmable by modifying the binary selector values in the Interrupt Selector Control}
registers fields. Table 14 shows the default interrupt sources for Interrupts INT_04 through INT_15. For more detailed
information on interrupt sources and selection, see the Interrupt Selector and External Interrupts chapter of the
TMS320C6000 Peripherals Reference Guide (literature number SPRU190).
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