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SMJ320C6203 Datasheet, PDF (44/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR
SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS033 – FEBRUARY 2002
ASYNCHRONOUS MEMORY TIMING (CONTINUED)
CLKOUT1
CEx†
BE[3:0]
EA[21:2]
ED[31:0]
AOE
ARE
AWE
Setup = 2 Strobe = 3 Hold = 2
1
1
1
1
6
7
2
2
2
3
4
2
5
ARDY
† CEx stays active for seven minus the value of Read Hold cycles after the last access (DMA transfer or CPU access). For example, if read
HOLD = 1, then CEx stays active for six more cycles. This does not affect performance, it merely reflects the EMIF’s overhead.
Figure 15. Asynchronous Memory Read Timing (ARDY Not Used)
Setup = 2 Strobe = 3
Not Ready
Hold = 2
CLKOUT1
1
2
CEx†
1
BE[3:0]
1
EA[21:2]
ED[31:0]
2
2
3
4
AOE
ARE
1
2
8
10
9
AWE
11
ARDY
† CEx stays active for seven minus the value of Read Hold cycles after the last access (DMA transfer or CPU access). For example, if read
HOLD = 1, then CEx stays active for six more cycles. This does not affect performance, it merely reflects the EMIF’s overhead.
Figure 16. Asynchronous Memory Read Timing (ARDY Used)
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