SMJ320C6203 Datasheet, PDF (45/81 Pages) Texas Instruments – FIXED POINT SIGNAL PROCESSOR

SMJ320C6203
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
ASYNCHRONOUS MEMORY TIMING (CONTINUED)
SGUS033 – FEBRUARY 2002
CLKOUT1
CEx^†
BE[3:0]
EA[21:2]
ED[31:0]
Setup = 2 Strobe = 3 Hold = 2
12
13
12
13
12
13
12
13
AOE
ARE
15
16
14
AWE
ARDY
† _{If no write accesses are scheduled for the next cycle and write hold is set to 1 or greater, then CEx stays active for three cycles after the value}
of the programmed hold period. If write hold is set to 0, then CEx stays active for four more cycles. This does not affect performance, it merely
reflects the EMIF’s overhead.
Figure 17. Asynchronous Memory Write Timing (ARDY Not Used)
CLKOUT1
CEx^†
BE[3:0]
EA[21:2]
ED[31:0]
Setup = 2 Strobe = 3
12
12
12
12
Not Ready
Hold = 2
13
13
13
13
AOE
ARE
17
18
19
AWE
11
ARDY
† _{If no write accesses are scheduled for the next cycle and write hold is set to 1 or greater, then CEx stays active for three cycles after the value}
of the programmed hold period. If write hold is set to 0, then CEx stays active for four more cycles. This does not affect performance, it merely
reflects the EMIF’s overhead.
Figure 18. Asynchronous Memory Write Timing (ARDY Used)
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
45