K5L5628JTM Datasheet, PDF(73/98 Page) Samsung semiconductor – 256M Bit (16M x16) Synchronous Burst , Multi Bank NOR Flash / 128M Bit(8M x16) Synchronous Burst UtRAM

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K5L5628JTM Datasheet, PDF (73/98 Pages) Samsung semiconductor – 256M Bit (16M x16) Synchronous Burst , Multi Bank NOR Flash / 128M Bit(8M x16) Synchronous Burst UtRAM

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K5L5628JT(B)M

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MCP MEMORY

Table 11. Burst Sequence

Burst Address Sequence(Decimal)

Start

Addr.

4 word Burst

8 word Burst

Wrap1)

16 word Burst

Linear Interleave

Linear

Interleave

Linear

Interleave

0-1-2-3 0-1-2-3

0-1-...-5-6-7 0-1-2-...-6-7 0-1-2-...-14-15 0-1-2-3-4...14-15

1-2-3-0 1-0-3-2

1-2-...-6-7-0 1-0-3-...-7-6

1-2-3-...-15-0

1-0-3-2-5...15-14

2-3-0-1 2-3-0-1 2-3-...-7-0-1 2-3-0-...-4-5

2-3-4-...-0-1

2-3-0-1-6...12-13

3-0-1-2 3-2-1-0 3-4-...-0-1-2 3-2-1-...-5-4

3-4-5-...-1-2

3-2-1-0-7...13-12

4-5-...-1-2-3 4-5-6-...-2-3

4-5-6-...-2-3

4-5-6-7-0...10-11

5-6-...-2-3-4 5-4-7-...-3-2

5-6-7-...-3-4

5-4-7-6-1...11-10

6-7-...-3-4-5 6-7-4-...-0-1

6-7-8-...-4-5

6-7-4-5-2...8-9

7-0-...-4-5-6 7-6-5-...-1-0

7-8-9-...-5-6

7-6-5-4-3...9-8

14-15-0-...-12-13 14-15-12-...-0-1

15-0-1-...-13-14 15-14-13-...-1-0

255

1. Wrap : Burst Address wraps within word boundary and ends after fulfilled the burst length.

2. 256 word Full page burst mode needs to meet tBC(Burst Cycle time) parameter as max. 2500ns.

Full Page(256 word)

Linear

0-1-2-...-254-255

1-2-3-...-255-0

2-3-4-...-255-0-1

3-4-5-...-255-0-1-2

4-5-6-...-255-0-1-2-3

5-6-7-...-255-...-3-4

6-7-8-...-255-...-4-5

7-8-9-...-255-...-5-6

14-15-...-255-...-12-13

15-16-...-255-...-13-14

255-0-1-...-253-254

Revision 1.0

November 2004

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