K5L5628JTM Datasheet, PDF (50/98 Pages) Samsung semiconductor – 256M Bit (16M x16) Synchronous Burst , Multi Bank NOR Flash / 128M Bit(8M x16) Synchronous Burst UtRAM

K5L5628JT(B)M
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MCP MEMORY
SWITCHING WAVEFORMS
5 cycles for initial access shown.
CR setting : A14=0, A13=0, A12=1
tCES
15.2 ns typ(66MHz).
tCEZ
CE
CLK
AVD
A0-A23
DQ0-DQ15
OE
Hi-Z
RDY
tAVDS
tAVDH
tACS
tACH
tOER
tIAA
tRDYA
tBDH
tBA
D6
D7 D8 D9
tRDYS
Hi-Z
D13
tOEZ
Hi-Z
Figure 7. 8 word Linear Burst Mode (No Wrap Case)
Note: In order to avoid a bus conflict the OE signal is enabled on the next rising edge after AVD is going high.
50
Revision 1.0
November 2004