K5L5628JTM Datasheet, PDF (69/98 Pages) Samsung semiconductor – 256M Bit (16M x16) Synchronous Burst , Multi Bank NOR Flash / 128M Bit(8M x16) Synchronous Burst UtRAM

K5L5628JT(B)M
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MCP MEMORY
MRS pin Control Type Mode Register Setting Timing
In this device, MRS pin is used for two purposes. One is to get into the mode register setting and the other one is to execute Partial
Array Refresh mode.
To get into the Mode Register Setting, the system must drive MRS pin to VIL and immediately(within 0.5µs) issue a write com-
mand(drive CS, ADV, UB, LB and WE to VIL and drive OE to VIH during valid address). If the subsequent write command(WE signal
input) is not issued within 0.5µs, then the device might get into the PAR mode.
Fig.5 MODE REGISTER SETTING TIMING(OE=VIH)
0
1
2
3
4
5
6
7
8
9 10 11 12 13
CLK
ADV
Address
CS
UB, LB
WE
MRS
tWC
tCW
tAW
tBW
tWP
tAS
tMW
tWU
(MRS SETTING TIMING)
1. Clock input is ignored.
Register Write Start
Register Update Complete
Register Write Complete
Table 8. MRS AC CHARACTERISTICS (VCC=2.5~2.7V, VCCQ=1.7~2.0V TA=-30 to 85°C, Maximum Main Clock Frequency
= 52.9MHz)
MRS
Parameter List
MRS Enable to Register Write Start
End of Write to MRS Disable
Symbol
tMW
tWU
Speed
Min
Max
0
500
0
-
Units
ns
ns
69
Revision 1.0
November 2004