E702289_SH7290 Datasheet, PDF (230/252 Pages) Renesas Technology Corp – SH7290 E10A Emulator

Notes: 1. When the [L-bus] or [I-bus] radio button is selected, the following bus cycles will be
traced.
L-bus: A bus cycle generated by the CPU is acquired. A bus cycle is also acquired
when the cache has been hit.
I-bus: A bus cycle generated by the CPU or DMA is acquired. A bus cycle is not
acquired when the cache has been hit.
When U-RAM or X/Y-RAM is accessed from the P0 space, the I-bus must be selected,
and when accessed from the P2 space, the L-bus must be selected. When a cache fill
cycle is acquired, I-bus must be selected.
2. Address setting when X/Y–bus is selected
To trace both the X/Y–bus when the X/Y–bus is accessed at the same time, the X-bus
condition must be set in channel A, and the Y-bus condition must be set in channel B.
3. The AUD trace acquisition is not available when [User] is selected in the [UBC mode]
list box of the [Configuration] dialog box.
(c) Software Trace Function
Note: This function can be supported with SHC compiler V7.0 and later.
When a specific instruction is executed, the PC value at execution and the contents of one
general register are acquired by trace. Describe the Trace(x) function (x is a variable name) to
be compiled and linked beforehand. For details, refer to the SHC manual.
When the load module is loaded on the emulator and a valid software trace function is
executed, the PC value that has executed the Trace(x) function, the general register value for x,
and the source lines are displayed.
To activate the software trace function, select the [Software trace] check box in the [AUD
function] group box of the [Trace mode] page.
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