E702289_SH7290 Datasheet, PDF (222/252 Pages) Renesas Technology Corp – SH7290 E10A Emulator

• Memory Access during User Program Break
The emulator can download the program for the flash memory area. Other memory write
operations are enabled for the RAM area. Therefore, an operation such as memory write or
BREAKPOINT should be set only for the RAM area.
• Cache Operation during User Program Break
When cache is enabled, the emulator accesses the memory by the following methods:
 At memory write: Writes through the cache, then writes to the memory.
 At memory read: Does not change the cache write mode that has been set.
Therefore, when memory read or write is performed during user program break, the cache state
will be changed.
• Port G
The AUD and Hitachi-UDI pins are multiplexed as shown in table 6.3.
Table 6.3 Multiplexed Functions
Port
G
G
G
G
G
G
Function 1
PTG5 input/output (port) *¹
PTG4 input/output (port) *²
PTG3 input/output (port) *²
PTG2 input/output (port) *²
PTG1 input/output (port) *²
PTG0 input/output (port) *²
Function 2
/ASEBRKAK (Hitachi-UDI)
/AUDSYNC (AUD)
AUDATA3 (AUD)
AUDATA2 (AUD)
AUDATA1 (AUD)
AUDATA0 (AUD)
Notes: 1. PTG5 cannot be used when the E10A emulator is used.
2. Function 1 can be used when the AUD pins of the device are not connected to the
SH7290 E10A emulator. Note that the SH7290 E10A setting should be made so that
function 2 would be forcibly used during activation. If function 1 is to be used, the
setting should be made by the pin function controller.
• UBC
When [User] is specified in the [UBC mode] list box in the [Configuration] dialog box, the UBC
can be used in the user program.
Do not use the UBC in the user program as it is used by the E10A emulator when [EML] is
specified in the [UBC mode] list box in the [Configuration] dialog box.
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