PIC18F1220_07 Datasheet, PDF (86/308 Pages) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology

PIC18F1220/1320
9.5 RCON Register
The RCON register contains bits used to determine the
cause of the last Reset or wake-up from a low-power
mode. RCON also contains the bit that enables
interrupt priorities (IPEN).
REGISTER 9-10:
RCON REGISTER
R/W-0
U-0
IPEN
—
bit 7
U-0
R/W-1
R-1
R-1 R/W-0 R/W-0
—
RI
TO
PD
POR
BOR
bit 0
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
For details of bit operation, see Register 5-3.
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 5-3.
PD: Power-down Detection Flag bit
For details of bit operation, see Register 5-3.
POR: Power-on Reset Status bit
For details of bit operation, see Register 5-3.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 5-3.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS39605F-page 84
© 2007 Microchip Technology Inc.