PIC18F1220_07 Datasheet, PDF (221/308 Pages) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology

PIC18F1220/1320
NEGF
Negate f
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
[ label ] NEGF f [,a]
0 ≤ f ≤ 255
a ∈ [0,1]
(f) + 1 → f
N, OV, C, DC, Z
0110 110a ffff ffff
Location ‘f’ is negated using two’s
complement. The result is placed in
the data memory location ‘f’. If ‘a’ is
‘0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value.
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register ‘f’
Q3
Process
Data
Q4
Write
register ‘f’
Example:
NEGF REG, 1
Before Instruction
REG = 0011 1010 [0x3A]
After Instruction
REG = 1100 0110 [0xC6]
NOP
No Operation
Syntax:
Operands:
[ label ] NOP
None
Operation:
No operation
Status Affected:
Encoding:
Description:
Words:
Cycles:
None
0000 0000
1111 xxxx
No operation.
1
1
0000
xxxx
0000
xxxx
Q Cycle Activity:
Q1
Q2
Decode
No
operation
Q3
No
operation
Q4
No
operation
Example:
None.
© 2007 Microchip Technology Inc.
DS39605F-page 219