PIC18F1220_07 Datasheet, PDF (124/308 Pages) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology

PIC18F1220/1320
15.5.4 HALF-BRIDGE MODE
In the Half-Bridge Output mode, two pins are used as
outputs to drive push-pull loads. The PWM output
signal is output on the RB3/CCP1/P1A pin, while the
complementary PWM output signal is output on the
RB2/P1B/INT2 pin (Figure 15-6). This mode can be
used for half-bridge applications, as shown in
Figure 15-7, or for full-bridge applications, where four
power switches are being modulated with two PWM
signals.
In Half-Bridge Output mode, the programmable dead-
band delay can be used to prevent shoot-through
current in half-bridge power devices. The value of bits,
PDC6:PDC0 (PWM1CON<6:0>), sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. See
Section 15.5.6 “Programmable Dead-Band Delay”
for more details of the dead-band delay operations.
The TRISB<3> and TRISB<2> bits must be cleared to
configure P1A and P1B as outputs.
FIGURE 15-6:
HALF-BRIDGE PWM
OUTPUT (ACTIVE-HIGH)
Period
Period
Duty Cycle
P1A
td
td
P1B
(1)
(1)
(1)
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
PR2 register.
FIGURE 15-7:
EXAMPLES OF HALF-BRIDGE OUTPUT MODE APPLICATIONS
Standard Half-Bridge Circuit (“Push-Pull”)
PIC18F1220/1320 _FET
Driver
+
P1A
V
-
FET
Driver
P1B
Load
+
V
-
Half-Bridge Output Driving a Full-Bridge Circuit
PIC18F1220/1320
P1A
P1B
FET
Driver
FET
Driver
V+
Load
V-
FET
Driver
FET
Driver
DS39605F-page 122
© 2007 Microchip Technology Inc.