PIC18F1220_07 Datasheet, PDF(51/308 Page) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology

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PIC18F1220_07 Datasheet, PDF (51/308 Pages) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology

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PIC18F1220/1320

5.9.2 SPECIAL FUNCTION REGISTERS

The Special Function Registers (SFRs) are registers

used by the CPU and peripheral modules for controlling

the desired operation of the device. These registers are

implemented as static RAM. A list of these registers is

given in Table 5-1 and Table 5-2.

The SFRs can be classified into two sets: those asso-

ciated with the âcoreâ function and those related to the

peripheral functions. Those registers related to the

âcoreâ are described in this section, while those related

to the operation of the peripheral features are

described in the section of that peripheral feature.

The SFRs are typically distributed among the peripherals

whose functions they control.

The unused SFR locations will be unimplemented and

read as â0âs.

TABLE 5-1: SPECIAL FUNCTION REGISTER MAP FOR PIC18F1220/1320 DEVICES

Address

FFFh

FFEh

FFDh

FFCh

FFBh

Name

TOSU

TOSH

TOSL

STKPTR

PCLATU

Address

FDFh

FDEh

FDDh

FDCh

FDBh

Name

INDF2(2)

POSTINC2(2)

POSTDEC2(2)

PREINC2(2)

PLUSW2(2)

Address

FBFh

FBEh

FBDh

FBCh

FBBh

Name

CCPR1H

CCPR1L

CCP1CON

â

â

Address

F9Fh

F9Eh

F9Dh

F9Ch

F9Bh

FFAh PCLATH

FDAh FSR2H

FBAh

â

F9Ah

FF9h

PCL

FD9h FSR2L

FB9h

â

F99h

FF8h TBLPTRU

FD8h STATUS

FB8h

â

F98h

FF7h TBLPTRH

FD7h TMR0H

FB7h PWM1CON

F97h

FF6h TBLPTRL

FD6h TMR0L

FB6h ECCPAS

F96h

FF5h TABLAT

FD5h T0CON

FB5h

â

F95h

FF4h PRODH

FD4h

â

FB4h

â

F94h

FF3h PRODL

FD3h OSCCON

FB3h TMR3H

F93h

FF2h INTCON

FD2h LVDCON

FB2h TMR3L

F92h

FF1h INTCON2

FD1h WDTCON

FB1h T3CON

F91h

FF0h

FEFh

FEEh

FEDh

FECh

FEBh

INTCON3

INDF0(2)

POSTINC0(2)

POSTDEC0(2)

PREINC0(2)

PLUSW0(2)

FD0h

FCFh

FCEh

FCDh

FCCh

FCBh

RCON

TMR1H

TMR1L

T1CON

TMR2

PR2

FB0h

FAFh

FAEh

FADh

FACh

FABh

SPBRGH

SPBRG

RCREG

TXREG

TXSTA

RCSTA

F90h

F8Fh

F8Eh

F8Dh

F8Ch

F8Bh

FEAh FSR0H

FCAh T2CON

FAAh BAUDCTL

F8Ah

FE9h FSR0L

FC9h

â

FA9h EEADR

F89h

FE8h

FE7h

FE6h

FE5h

FE4h

FE3h

WREG

INDF1(2)

POSTINC1(2)

POSTDEC1(2)

PREINC1(2)

PLUSW1(2)

FC8h

FC7h

FC6h

FC5h

FC4h

FC3h

â

â

â

â

ADRESH

ADRESL

FA8h

FA7h

FA6h

FA5h

FA4h

FA3h

EEDATA

EECON2

EECON1

â

â

â

F88h

F87h

F86h

F85h

F84h

F83h

FE2h FSR1H

FC2h ADCON0

FA2h

IPR2

F82h

FE1h FSR1L

FC1h ADCON1

FA1h

PIR2

F81h

FE0h

BSR

FC0h ADCON2

FA0h

PIE2

F80h

Name

IPR1

PIR1

PIE1

â

OSCTUNE

â

â

â

â

â

â

â

TRISB

TRISA

â

â

â

â

â

â

â

LATB

LATA

â

â

â

â

â

â

â

PORTB

PORTA

Note 1: Unimplemented registers are read as â0â.

2: This is not a physical register.

Â© 2007 Microchip Technology Inc.

DS39605F-page 49

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