PIC18F1220_07 Datasheet, PDF (259/308 Pages) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology

PIC18F1220/1320
22.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 22-6:
EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
Q4
Q1
Q2
Q3
Q4
Q1
OSC1
CLKO
1
3
3
4
4
2
TABLE 22-4: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
1A
FOSC
External CLKI Frequency⁽¹⁾
DC
40
MHz EC, ECIO (LF and Industrial)
Oscillator Frequency⁽¹⁾
DC
25
MHz EC, ECIO (Extended)
DC
4
MHz RC oscillator
DC
1
MHz XT oscillator
DC
25
MHz HS oscillator
1
10
MHz HS + PLL oscillator
DC
33
kHz LP Oscillator mode
1
TOSC
External CLKI Period⁽¹⁾
25
—
ns EC, ECIO (LF and Industrial)
2
3
4
Note 1:
Oscillator Period⁽¹⁾
40
—
ns EC, ECIO (Extended)
250
—
ns RC oscillator
1000
—
ns XT oscillator
25
—
ns HS oscillator
100
1000
ns HS + PLL oscillator
30
—
μs LP oscillator
TCY
Instruction Cycle Time⁽¹⁾
100
—
ns TCY = 4/FOSC
TosL, External Clock in (OSC1)
30
TosH
High or Low Time
2.5
—
ns XT oscillator
—
μs LP oscillator
10
—
ns HS oscillator
TosR, External Clock in (OSC1)
—
TosF
Rise or Fall Time
—
20
ns XT oscillator
50
ns LP oscillator
—
7.5
ns HS oscillator
Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations
except PLL. All specified values are based on characterization data for that particular oscillator type under
standard operating conditions, with the device executing code. Exceeding these specified limits may result
in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested
to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock
input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
© 2007 Microchip Technology Inc.
DS39605F-page 257