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PIC18F1220_07 Datasheet, PDF (11/308 Pages) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology
PIC18F1220/1320
TABLE 1-2: PIC18F1220/1320 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
PDIP/
SOIC
SSOP
QFN
Pin
Type
Buffer
Type
Description
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/AN4/INT0
RB0
AN4
INT0
8
9
9
I/O TTL
Digital I/O.
I Analog
Analog input 4.
I
ST
External interrupt 0.
RB1/AN5/TX/CK/INT1 9
RB1
AN5
TX
CK
INT1
10 10
I/O TTL
I Analog
O
—
I/O ST
I
ST
Digital I/O.
Analog input 5.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX/DT).
External interrupt 1.
RB2/P1B/INT2
RB2
P1B
INT2
17 19 23
I/O TTL
O
—
I
ST
Digital I/O.
Enhanced CCP1/PWM output.
External interrupt 2.
RB3/CCP1/P1A
RB3
CCP1
P1A
18 20 24
I/O TTL
I/O ST
O
—
Digital I/O.
Capture 1 input/Compare 1 output/PWM 1 output.
Enhanced CCP1/PWM output.
RB4/AN6/RX/DT/KBI0 10 11 12
RB4
I/O TTL
Digital I/O.
AN6
I Analog
Analog input 6.
RX
I
ST
EUSART asynchronous receive.
DT
I/O ST
EUSART synchronous data (see related TX/CK).
KBI0
I
TTL
Interrupt-on-change pin.
RB5/PGM/KBI1
RB5
PGM
KBI1
11 12 13
I/O TTL
I/O ST
I
TTL
Digital I/O.
Low-Voltage ICSP Programming enable pin.
Interrupt-on-change pin.
RB6/PGC/T1OSO/
T13CKI/P1C/KBI2
RB6
PGC
T1OSO
T13CKI
P1C
KBI2
12 13 15
I/O TTL
I/O ST
O
—
I
ST
O
—
I
TTL
Digital I/O.
In-Circuit Debugger and ICSP programming clock pin.
Timer1 oscillator output.
Timer1/Timer3 external clock output.
Enhanced CCP1/PWM output.
Interrupt-on-change pin.
RB7/PGD/T1OSI/
P1D/KBI3
RB7
PGD
T1OSI
P1D
KBI3
13 14 16
I/O TTL
I/O ST
I CMOS
O
—
I
TTL
Digital I/O.
In-Circuit Debugger and ICSP programming data pin.
Timer1 oscillator input.
Enhanced CCP1/PWM output.
Interrupt-on-change pin.
VSS
5 5, 6 3, 5 P
— Ground reference for logic and I/O pins.
VDD
14 15, 16 17, 19 P
— Positive supply for logic and I/O pins.
NC
— — 18 —
— No connect.
Legend:
TTL =
ST =
O=
OD =
TTL compatible input
Schmitt Trigger input with CMOS levels
Output
Open-drain (no P diode to VDD)
CMOS = CMOS compatible input or output
I
= Input
P
= Power
© 2007 Microchip Technology Inc.
DS39605F-page 9