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PIC18F1220_07 Datasheet, PDF (298/308 Pages) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology
PIC18F1220/1320
Capture/Compare/PWM (CCP)
Capture Mode. See Capture.
CCP1 ........................................................................ 116
CCPR1H Register ............................................ 116
CCPR1L Register ............................................ 116
Compare Mode. See Compare.
Timer Resources ...................................................... 116
Clock Sources .................................................................... 15
Selection Using OSCCON Register ........................... 16
Clocking Scheme ............................................................... 45
CLRF ................................................................................ 207
CLRWDT .......................................................................... 207
Code Examples
16 x 16 Signed Multiply Routine ................................. 72
16 x 16 Unsigned Multiply Routine ............................. 72
8 x 8 Signed Multiply Routine ..................................... 71
8 x 8 Unsigned Multiply Routine ................................. 71
Changing Between Capture Prescalers ................... 117
Computed GOTO Using an Offset Value ................... 47
Data EEPROM Read ................................................. 69
Data EEPROM Refresh Routine ................................ 70
Data EEPROM Write .................................................. 69
Erasing a Flash Program Memory Row ..................... 62
Fast Register Stack .................................................... 44
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................ 53
Implementing a Real-Time Clock Using a
Timer1 Interrupt Service .................................. 107
Initializing PORTA ...................................................... 87
Initializing PORTB ...................................................... 90
Reading a Flash Program Memory Word ................... 61
Saving Status, WREG and
BSR Registers in RAM ....................................... 85
Writing to Flash Program Memory ....................... 64–65
Code Protection ............................................................... 171
COMF ............................................................................... 208
Compare (CCP Module) ................................................... 117
CCP Pin Configuration ............................................. 117
CCPR1 Register ....................................................... 117
Software Interrupt ..................................................... 117
Special Event Trigger ....................................... 113, 117
Timer1/Timer3 Mode Selection ................................ 117
Compare (CCP1 Module)
Special Event Trigger ............................................... 164
Computed GOTO ............................................................... 47
Configuration Bits ............................................................. 171
Context Saving During Interrupts ....................................... 85
Conversion Considerations .............................................. 292
CPFSEQ .......................................................................... 208
CPFSGT ........................................................................... 209
CPFSLT ........................................................................... 209
Customer Change Notification Service ............................ 302
Customer Notification Service .......................................... 302
Customer Support ............................................................ 302
D
Data EEPROM Memory ..................................................... 67
Associated Registers ................................................. 70
EEADR Register ........................................................ 67
EECON1 Register ...................................................... 67
EECON2 Register ...................................................... 67
Operation During Code-Protect .................................. 70
Protection Against Spurious Write ............................. 69
Reading ...................................................................... 69
Using .......................................................................... 70
Write Verify ................................................................. 69
Writing ........................................................................ 69
DS39605F-page 296
Data Memory ..................................................................... 47
General Purpose Registers ....................................... 47
Map for PIC18F1220/1320 Devices ........................... 48
Special Function Registers ........................................ 49
DAW ................................................................................ 210
DC and AC Characteristics
Graphs and Tables .................................................. 267
DC Characteristics ........................................................... 250
Power-Down and Supply Current ............................ 241
Supply Voltage ......................................................... 240
DCFSNZ .......................................................................... 211
DECF ............................................................................... 210
DECFSZ .......................................................................... 211
Details on Individual Family Members ................................. 6
Development Support ...................................................... 233
Device Differences ........................................................... 291
Direct Addressing ............................................................... 54
E
Effects of Power Managed Modes on
Various Clock Sources .............................................. 18
Electrical Characteristics .................................................. 237
Enhanced Capture/Compare/PWM (ECCP) .................... 115
Outputs .................................................................... 116
PWM Mode. See PWM (ECCP Module).
Enhanced PWM Mode. See PWM (ECCP Module). ........ 119
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) ............................. 131
Equations
16 x 16 Signed Multiplication Algorithm ..................... 72
16 x 16 Unsigned Multiplication Algorithm ................. 72
A/D Minimum Charging Time ................................... 160
Acquisition Time ...................................................... 160
Errata ................................................................................... 4
EUSART
Asynchronous Mode ................................................ 140
12-bit Break Transmit and Receive ................. 146
Associated Registers, Receive ........................ 144
Associated Registers, Transmit ....................... 142
Auto-Wake-up on Sync Break ......................... 145
Receiver .......................................................... 143
Setting up 9-bit Mode with
Address Detect ........................................ 143
Transmitter ....................................................... 140
Baud Rate Generator (BRG) ................................... 135
Associated Registers ....................................... 136
Auto-Baud Rate Detect .................................... 139
Baud Rate Error, Calculating ........................... 135
Baud Rates, Asynchronous Modes ................. 136
High Baud Rate Select (BRGH Bit) ................. 135
Power Managed Mode Operation .................... 135
Sampling .......................................................... 135
Serial Port Enable (SPEN Bit) ................................. 131
Synchronous Master Mode ...................................... 148
Associated Registers, Reception ..................... 151
Associated Registers, Transmit ....................... 149
Reception ........................................................ 150
Transmission ................................................... 148
Synchronous Slave Mode ........................................ 152
Associated Registers, Receive ........................ 153
Associated Registers, Transmit ....................... 152
Reception ........................................................ 153
Transmission ................................................... 152
© 2007 Microchip Technology Inc.