MC9S12XD256CAG Datasheet, PDF (867/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

22.3.2.55 Port J Input Register (PTIJ)
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
7
6
5
4
3
2
1
0
R PTIJ7
PTIJ6
PTIJ5
PTIJ4
0
PTIJ2
PTIJ1
PTIJ0
W
Reset¹
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 22-57. Port J Input Register (PTIJ)
1 _{These registers are reset to zero. Two bus clock cycles after reset release the register values are updated with the associated}
pin values.
Read: Anytime.
Write: Never, writes to this register have no effect.
This register always reads back the buffered state of the associated pins. This can be used to detect
overload or short circuit conditions on output pins.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
869